Intel Expansions Endorse Class 1 Ballrooms

Intel Expansions Endorse Class 1 Ballrooms

By Meredith E. Lawrie

Santa Clara, CA–Intel (Santa Clara, CA) recently unveiled a $500 million expansion of the company`s D2 facility in Santa Clara to 160,000 ft.2, doubling the fab`s cleanroom space to 70,000 ft.2. This latest announcement adds to Intel`s growing list of manufacturing plants and expansion projects that house Class 1 ballroom-type cleanrooms.

According to Intel, the expansion will enable the company to produce up to 4,000 8-in. wafers a week on a 0.25-micron technology line. D2 was Intel`s first factory to manufacture advanced logic chips on 8-in. wafers and is both a research and development site, where engineers develop the manufacturing “recipes” for future generations of computer chips, and a manufacturing factory where the company builds its Pentium processors.

The plant will first develop the manufacturing “recipes” for future microprocessors and then build them in volume. The circuit lines on these chips will be about 0.25 microns in width.

Despite the industry`s current focus on mini-environments, the chips will be manufactured in a Class 1 ballroom-type cleanroom, a model Intel primarily adheres to. “When you`re manufacturing the kind of volumes we do, the larger cleanroom is the most cost-effective,” says Howard High, Intel`s corporate strategic marketing manager.

In this light, High doesn`t feel that Intel is bucking any trends. “We`ve kept close tabs on mini-environments, and we`ve had seven or eight quarters of record revenues and profits. We`re obviously doing something right.”

This same type of cleanroom is being utilized in several of Intel`s other expansions in the works. In

Chandler, AZ, for example, Fab 12 will house a 140,000 ft.2 Class 1 cleanroom. When construction is finished, the 1.5 million ft.2 production fab will build Pentium processors and related logic products on 0.25 micron, 8-in. wafers. The fab is scheduled to come on-line in 1997 and will cost Intel $1.3 billion. In Rio Rancho, NM, Phase 1 of Fab 11 is a 45,000 ft.2 Class 1 cleanroom expansion of the existing Fab 9 structure, featuring 0.6-micron, 8-in. wafers for producing Pentium and DX4 processors and related products. The factory has just passed qualification and is currently in the process of ramping into full production. Phase II of Fab 11 is a 140,000 ft.2 Class 1 cleanroom, 1.5 million ft.2 production fab that will manufacture Pentium processors on 0.4-micron, 8-in. wafers. Total cost for the fab will be about $1.8 billion, which is scheduled to come on-line in mid 1995.

High says this constant construction is nothing new to Intel. “If you don`t make it, you can`t sell it,” he says. “You put your money on the table to create a manufacturing factory that takes two to three years to generate revenue. It`s never a step taken lightly, but its one that, in the long run, is a competitive advantage.”

The D2 facility is expected to be fully operational by late 1995, early 1996.

Looking at the future of Intel, High envisions dimensions to continue getting smaller and process requirements cleaner and purer. He believes Intel will, sometime in the future, be involved in the production of 12-in. wafers, but is reluctant to look too far ahead, focusing instead on the immediate future and the current status of Intel`s manufacturing plants and expansion projects.n


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