Sidense, UMC qualify 90-65nm OTP cores

April 26, 2006 – Sidense Corp., a fabless provider of one-time-programmable (OTP) memory IP, said its 1T-Fuse family of embedded OTP cores is slated to be silicon-verified in UMC’s 90nm and 65nm process technologies, three months after producing a 130nm version of the technology.

The cores are scalable across UMC’s CMOS processes and portable to other technology nodes, such as 110nm and 80nm. The technology, which can be parameterized to obtain different configurations, can be used to replace external flash and EEPROM as well as a field-programmable alternative to MASK ROM.

End-use applications include SoCs for printers, cameras, set-top boxes, mobile and handheld devices.


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