Synospsys Custom Design Platform accelerates robust custom design for Samsung Foundry’s 7LPP process technology

Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Electronics Co., Ltd. has certified the Synopsys Custom Design Platform for Samsung Foundry’s 7-nanometer (nm) Low Power Plus (LPP) process Samsung Foundry’s 7LPP is its first semiconductor process technology to use extreme ultraviolet (EUV) lithography, a process technology that greatly reduces complexity and offers significantly better yield and fast turnaround time when compared to its 10-nanometer (10nm) FinFET predecessors. Synopsys custom design tools have been updated to support Samsung Foundry’s 7LPP requirements. In addition, a Synopsys-ready process design kit (PDK) and custom design reference flow are available from Samsung Foundry.

The Synopsys Custom Design Platform has been certified for Samsung Foundry’s 7LPP process technology. The platform is centered around the Custom Compiler custom design and layout environment, and includes HSPICE, FineSim SPICE and CustomSim FastSPICE circuit simulation, StarRC parasitic extraction, and IC Validator physical verification. To support efficient 7LPP custom design, Synopsys and Samsung Foundry have collaborated to develop a reference flow that includes a set of tutorials illustrating key requirements of 7-nm design and layout. These tutorials include sample design data and step-by-step instructions for performing typical design and layout tasks. Topics covered include electrical rule checking, circuit simulation, mixed-signal simulation, Monte Carlo analysis, layout, parasitic analysis, and electromigration.

To achieve certification from Samsung Foundry, Synopsys tools have been optimized to support the demanding requirements of 7-nm design, including:

  • Accurate FinFET device modeling with device aging effect
  • Advanced Monte Carlo simulation features to enable efficient analysis
  • High-performance transient noise simulation for analog and RF designs
  • High-performance post-layout simulation to enable parasitic-aware design and simulation
  • Dynamic circuit ERC for device voltage checks
  • High-performance transistor-level EM/IR analysis to minimize over-design
  • Efficient symbolic editing of FinFET device arrays
  • EUV support
  • Coverage-based via resistance extraction

“Our custom design collaboration with Synopsys has expanded substantially over the past two years,” said Ryan Sanghyun Lee, vice president of Foundry Marketing Team at Samsung Electronics. “With this latest effort, we have added Synopsys Custom Design Platform support for our 7LPP process, including a custom design reference flow based on Synopsys tools.”

“We’ve been collaborating closely with Samsung Foundry to simplify custom design using FinFET process technology,” said Bijan Kiani, vice president of product marketing at Synopsys. “Together we have delivered certified tools, a reference flow, a PDK, simulation models, and runsets to enable Samsung customers to achieve robust custom designs on the 7LPP process.”


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