Tag Archives: RRAM

Mott Memristor Chaos could make Efficient AI

Congratulations to Suhas Kumar, John Paul Strachan, and R. Stanley Williams of Hewlett Packard Labs in Palo Alto for showing not just how to make a Mott memristor, but that you can create controlled chaos with one. “We showed that this type of memristor can generate chaotic and nonchaotic signals,” says Williams, who invented the memristor based on theory by Leon Chua. An analysis of the material science and engineering of titanium sub-oxides as practiced by Williams at HPL for the production of standard memristors can be found in one of my old blog posts (http://www.betasights.net/wordpress/?p=1006).

Cross-section TEM of a Mott memristor composed of 8nm niobium dioxide layer between top layer of titanium nitride and bottom pillar of titanium nitride. (Original Image: Suhas Kumar/Hewlett Packard Labs, color commentary by Ed Korczynski)

Cross-section TEM of a Mott memristor composed of 8nm niobium dioxide layer between top layer of titanium nitride and bottom pillar of titanium nitride. (Original Image: Suhas Kumar/Hewlett Packard Labs, color commentary by Ed Korczynski)

The Figure shows a cross-section of a single Mott memristors formed by the region of the 8nm thin niobium dioxide (NbO2) layer that is between the 70nm diameter titanium-nitride (TiN) pillar functioning as bottom electrode and the blanket TiN layer functioning as top electrode.

Such a device exhibits both current-controlled and temperature-controlled (https://en.wikipedia.org/wiki/Mott_transition) negative differential resistance, and the proper choice of current and temperature can result in what I like to term “repeatable” chaos. It is repeatable in that a state can be controlably placed into or out-of chaos using non-linearities in electrical current-flow and temperature. From the abstract of the original article in Nature:

We incorporate these memristors into a relaxation oscillator and observe a tunable range of periodic and chaotic self-oscillations. We show that the nonlinear current transport coupled with thermal fluctuations at the nanoscale generates chaotic oscillations. Such memristors could be useful in certain types of neural-inspired computation by introducing a pseudo-random signal that prevents global synchronization and could also assist in finding a global minimum during a constrained search.

In a simulated circuit, an array of Mott memristors can be integrated with standard memristors to form a simulated Hopfield network (https://en.wikipedia.org/wiki/Hopfield_network). Hopfield nets seem to be some of the most apt models for human memory, so if we can just wire together a sufficient number of NbO Mott memristors with TiO standard memristors then we might be a step closer to functional AI.

Read the fine coverage at IEEE Spectrum:  https://spectrum.ieee.org/nanoclast/semiconductors/devices/memristordriven-analog-compute-engine-would-use-chaos-to-compute-efficiently

Or the Nature article behind paywall:  https://www.nature.com/nature/journal/v548/n7667/full/nature23307.html

—E.K.

3D XPoint uses PCM Material in ReRAM Device

IM Flash pre-announced “3D XPoint”(TM) memory for release later this year, and lack of details has led to widespread confusion regarding what it is. EETimes has reported that, “Chalcogenide material and an Ovonyx switch are magic parts of this technology with the original work starting back in the 1960’s,” said Guy Blalock, co-CEO of IM Flash at the 2016 Industry Strategy Symposium hosted by the SEMI trade group. However, contradicting industry terminology conventions, in another article EETimes reported that a spokesperson for Intel has said that, “3D XPoint should not be described as ReRAM.”
First promoted by the master of materials solutions-looking-for-problems Sanford Ovshinsky under the name “Ovonic” trademark, chalcogenide materials form glassy structures with meta-stable properties. With proper application of heat and electrical current, chalcogenides can be made to switch between low-resistivity crystalline and high-resistivity amorphous phases to create Phase-Change Memory (PCM) arrays in silicon circuit architectures. Chalcogenides can also function as the matrix for the diffusion of silver ions in a cross-point device architecture to create a digital “Resistive RAM” (or “ReRAM” or “RRAM”), or create an analog memristor for neuromorphic applications as explored by Prof. Kris Campbell of Boise State in collaboration with Knowm.

Hitachi and Renesas Technology developed Phase-Change Memory (PCM) cell technology employing Ta2O5 interfacial layer to enable low-power operation. (Source: Hitachi)

Hitachi and Renesas Technology developed Phase-Change Memory (PCM) cell technology employing Ta2O5 interfacial layer to enable low-power operation. (Source: Hitachi)

The Figure shows a schematic cross-section of a typical PCM cell. From a scientific perspective, we could say that any memory cell that relies upon a change in material phase to encode digital data should be termed a PCM. However, due to the history of this specific type of PCM device being the only architecture explored for decades (and commercialized for limited niche sub-markets), and due to the fundamentally different circuit architectures, it is reasonable to categorically deny that any cross-point device is a “PCM.”
However, any cross-point memory device based on a resistance change has to be a ReRAM regardless of the switching phenomenon:  phase-change, filament-growth, ion-diffusion, etc. So we could say that this new chip uses PCM material in a ReRAM device.
—E.K.

Cross-point ReRAM Integration Claimed by Intel/Micron

The Intel/Micron joint-venture now claims to have successfully integrated a Resistive-RAM (ReRAM) made with an unannounced material in a cross-point architecture, switching using an undisclosed mechanism. Pilot production wafers are supposed to be moving through the Lehi fab, and samples to customers are promised by end of this year.
HP Labs announced great results in 2010 on prototype ReRAM using titania without the need for a forming step, and then licensed the technology to Hynix with plans to bring a cross-point ReRAM to market by 2013. SanDisk/Toshiba have been working on ReRAM as an eventual replacement for NAND Flash for many years, with though a bi-layer 32Gb cross-point ReRAM was shown at ISSCC in 2013 they have so far not announced production.
Let us hope that the folks in Lehi have succeeded where HP/Hynix and SanDisk/Toshiba among others have so far failed in bringing a cross-point ReRAM to market…so this may be a “breakthrough” but it’s by no means “revolutionary.” Until the Intel/Micron legal teams decide that they can disclose what material is changing resistance and by what mechanism (including whether an electrical “forming” step is needed), the best we can do is speculate as to even how much of a breakthrough this represents.
—E.K.