By Jeff Dorsch
Three-dimensional integrated circuits are right around the corner. No, wait, they aren’t. Check that – they’re definitely on the way. It all depends on what kind of 3DICs you’re talking about.
Stacked-memory technology – that’s here and now. Silicon interposers – check, double check, triple check. But logic and memory integration in one 3D package? That’s a whole other thing.
The path to realization of 3DIC technology has led to a curious term: 2.5D, to indicate that it’s not quite 3D, but more advanced than the traditional 2D packaging. With 2.5D, two chips basically make a sandwich with a silicon interposer between them, employing system-in-package technology.
Lode Lauwers, imecLode Lauwers, vice president of business development at imec, the Belgium-based microelectronics and nanoelectronics research organization, says of 3DIC technology, “Yes, it’s slowing down, but it absolutely will happen.” Many in the semiconductor industry “underestimated” how complex and difficult the technology has proven to implement, he notes. “It’s not just a good TSV [through-silicon via]. You need to be able to test it,” Lauwers says.
While 3DIC technology beyond stacked memories is proceeding “a little bit slower,” Lauwers asserts, “We’re fully confident it’s going to happen.” He looks for the leading silicon foundries to begin volume production of 3DICs in 2014 or 2015, following prototype production. “By the end of the decade, we will have steps nearly complete,” Lauwers adds.
For companies that make semiconductor inspection and metrology equipment, such as KLA-Tencor, 3DICs are presenting a substantial technical challenge, according to Brian Trafas, the company’s chief marketing officer. “You need to be able to detect particles, bridging,” he says. “Customers are interested in not only a top-down structure, but sidewall construction…the top, bottom of the trench.”
The complexity of process steps in 3DIC structures, along with the increased number of process steps, means process control in the 3DIC era will mean “a higher spend rate,” Trafas says. “KLA-Tencor and some of our competitors are seeing that.”
Sesh Ramaswami, managing director of TSV and advanced packaging/advanced product technology development in the Silicon Systems Group of Applied Materials, sees 3DIC structures coming along in a gradual process. “From a technology point of view, TSV has borne out,” he says. “That takes the first hurdle out of the way. It’s like any new technology; you have to work things out.”
It’s natural to have “some bumps along the way,” Ramaswami says – and we don’t mean wafer bumps.
The Applied executive sees three approaches to 3DIC structures contending in the industry – the Hybrid Memory Cube, JEDEC’s Wide I/O standard and the high-bandwidth stack. Ramaswami sees logic and memory integration in 3DICs going into volume production in two years.
“Most of the work on the TSV has been how to make it smaller [for mobile applications],” he notes. “That’s no show-stopper.”
Temporary bonding of substrates to a carrier of glass or silicon is a key development in 3DIC technology, Ramaswami says. “For the last three to four years, people have been working on that,” he adds.
The multichip modules of two decades ago don’t compare with what is being done in 3DIC structures, according to Ramaswami. MCMs represent 2D integration, not 3D, he asserts. The ceramic substrates of MCMs proved to be “expensive,” he says. With silicon interposers, the ceramic material is replaced with silicon, the Applied executive notes. An interposer, he says, is essentially “an MCM on silicon.”
For Risto Puhakka, president of VLSIresearch, the market research firm, says that when it comes to 3D integration, “there’s been way too much talk, compared with results. There are benefits with 3D, but there are also limitations.” For signal integrity, “yes, it absolutely makes sense,” he notes. Such structures also offer speed advantages, he adds.
But when it comes to “beating Moore’s Law, it’s not economical,” Puhakka says.
Paul Lindner, EVGroupPaul Lindner, executive technology director for EV Group, says of 3DIC structures, “A system needs to be designed around 3DIC. You can’t just drop in memory chips.” True system integration with 3DIC technology “requires close integration with the microprocessor or logic,”
Temporary bonding “is not fully realized,” he says. “Only in the past one to two years, interposers became more important. Now they are on top of the list.” Interposers are “needed for stacking memories, microprocessors, logic devices,” Lindner says.
The EV Group executive says, “We believe in the performance benefits of 3DIC. We think it will come. It will be a key enabling technology to expand Moore’s Law in a cost-effective way without shrinking [IC dimensions].”
A session devoted to “Advancing 2.5D and 3D Packaging through Value Engineering” will be presented at TechXPOT North, in the North Hall of Moscone Center, at 1 p.m. on Wednesday, July 10.
The program summary states, “Growing industry requirement for vertical and heterogeneous integration, as well as related packaging strategies, remains a crucial focus for many forward-looking semiconductor supply chain players. While the implementation timeline of true 3D packaging with TSV technology has been pushed out for many applications, a number of highly innovative solutions for interposers (2.5D) are already hitting the market. However, improving process yield and lowering the cost relative to alternatives are proving resilient bottlenecks to mainstream 2.5D and 3D packaging. Clearly, headway hinges on the delivery of value appropriate to the function.
“For an industry seeking progression of 2.5D, as well as an effective value/function equation for 3D, it appears that success can partly be found in the innovation and evolution of equipment and materials. This session will take a critical look at supply chain ecosystem participants who are pioneering tools and materials, exclusively geared towards high-volume implementation of 2.5D and 3D packaging.”
Keynote addresses in the Wednesday session will be given by executives from Altera, the Association of Super-Advanced Electronics Technologies and the KPMG Global Semiconductor Practice. The keynotes will be followed by an infrastructure panel session with executives of Amkor Technology, ASE Group, Hitachi Chemical, STATS ChipPAC, TEL NEXX and United Microelectronics Corp.
Three-dimensional films are a hot trend in movie theaters, although 3D video on television hasn’t enjoyed much adoption. For 3DIC structures in semiconductors, there may be comparable levels of mixed success.