It’s Not Just the Dielectric
Low-k Meets Circuit Integration
One of the most important, and frustrating, lessons of the semiconductor industry’s long struggle with low-k dielectrics is the need to consider those materials in the context of fully integrated circuits. Results derived from test structures on blanket films may not extrapolate to actual circuits.
For example, the impact of packaging on the dielectric material is still not well understood. In 2006, regulations in the European Union prohibited the use of lead-based solders in consumer electronics. Alternative solders, often based on tin-silver-copper alloys, generally have higher melting points and require more bonding pressure. These parameters may lie outside the expected process space for integration schemes that were successful with lead-based solders.
Third-generation materials
Third-generation low-k dielectric materials give manufacturers additional flexibility to address constraints imposed by the circuit as a whole. As explained by Klaus Schuegraf, CTO of Applied Materials’ Silicon Systems Group second generation materials incorporated relatively large pores into dense carbon-doped oxide materials. Third generation materials, in contrast, still depend on carbon-doped oxides, but are based on new starting materials that incorporate nanometer-scale pores into the oxide’s molecular structure. In third generation materials, Schuegraf said, manufacturers can more precisely engineer porosity to achieve the dielectric constant and mechanical strength required by a particular integration scheme.
This control of the material structure gives process engineers new ways to address plasma damage as well. Plasma is used in both pre- and post-etch cleaning steps, as well as in the dielectric etch itself, and plasma damage has always been one of the most severe obstacles to low-k dielectric integration. Carbon depletion is one of the most notorious damage mechanisms, but the etch-clean cycle can also deposit residues on the dielectric surface, densify the dielectric material, and damage the sidewalls of features. If plasma damage is bad enough, the metal diffusion barrier may fail to adhere, allowing moisture and metal ions to infiltrate the dielectric. Even under optimum conditions, the damaged layer increases the effective dielectric constant of the structure. As device features get smaller, the damaged layer accounts for a larger fraction of the total linewidth, to the point where damage can offset the advantages of a lower dielectric constant.
Optimism
Still, the view within the industry is optimistic for dielectric repair processes to reverse the effects of carbon depletion. Unfortunately, most were reluctant to discuss specific repair schemes in any detail. Some alternatives have appeared in the open literature. For example, in work presented at MRS, Sven Zimmerman of Fraunhofer ENAS reported that methylation and silyation can both restore depleted carbon. His group immersed etched low-k materials in HMDS (C6H19NSi2), finding that the Si-methyl groups bonded to the dielectric surface, while UV radiation helped to eliminate excess hydrogen. Other approaches depend on combinations of heat, optical treatments, and controlled atmospheres to extract incorporated moisture and restore the dielectric’s surface composition.
Timing
Timing is an important variable in any potential repair strategy. Since damage can occur at several points, up to and including the final cleaning step before deposition of the metal diffusion barrier, the repair step should be inserted into the flow as late as possible. On the other hand, any repair of the dielectric must be completed before deposition of the diffusion barrier, both to ensure good barrier adhesion and because deposition of the barrier will block any further changes to the dielectric.
In March, Novellus introduced the Lumier pre-treatment chamber for the company’s Vector Excel diffusion barrier deposition system. This chamber can provide heat treatment, optical treatment at a variety of wavelengths, and a controlled atmosphere, thereby supporting a number of potential pre-treatment strategies. According to Easwar Srinivasan, Novellus’ director of product marketing for PECVD, the company has seen materials with as-deposited k=2.4 degrade to dielectric constants of 3.1 to 3.2 after etching. In internal tests, the company has been able to restore 70 to 80% of that damage. While similar numbers have been achieved in complete circuits, Boaz Kenane, director of technology for UVTP PECVD at Novellus, warned that the capacitance of fully integrated devices is difficult to measure, and actual RC constants may vary.
This brings us back to a central challenge of low-k integration: the impact of the rest of the device structure. Not only packaging, but also etch pattern dependencies and the characteristics of the copper lines all play important roles.