3D Stacking and Structures Call for More Atomic-Level Precision Manufacturing Steps
Omkaram (Om) Nalamasu, CTO of Applied Materials, sat down with SEMICON Show Daily to talk about what’s changing in semiconductors and how that will affect manufacturing equipment. What follows are excerpts of that conversation.
SSD: 3D stacking and 3D structures represent an inflection point for semiconductors. What does that mean for manufacturing equipment, though?
Nalamasu: The number of steps, as well as the complexity, will go up. We will need more materials to get energy-efficient performance. So there will be innovations at multiple levels. At the heart of all of this, and the ability to drive Moore’s Law forward, however, is the ability to control thin films with atomic precision. Innovations in equipment are fundamental to reach atomic-level engineering.
SSD: How do we deal with process variability?
Nalamasu: We continuously make improvements in this area. Chamber matching is one activity we’re pursuing—wafer to wafer, batch to batch. Repeatability needs to be improved.
SSD: Will it be CMOS forever? There were also predictions that CMOS would run out of steam by now.
Nalamasu: In the foreseeable future, it will be CMOS. Whether it is forever is difficult to answer.
SSD: Where are we today with TSV manufacturing?
Nalamasu: The TSV solution has progressed to the point where several players are doing pilot-line activity. Some issues need to be resolved, but I don’t think those are insurmountable. It’s a question of time, innovation and collaboration.
SSD: The other 3D involves structures. How does that affect equipment?
Nalamasu: 3D transistors are more complex, but complexity is our friend. It requires synthesis of new ideas from multiple disciplines of science and engineering. A lot of work has occurred in 3D transistors, but Intel has announced a major step. It is taking 3D transistors toward production, playing toward Applied Materials’ strength.
SSD: Is Intel unusual, though, because of the very regular structure of its chips?
Nalamasu: Intel certainly leads us in taking this technology to manufacturing, both in process and design, but there will be many more industry innovations as well.
SSD: Where do you see the next big bottlenecks?
Nalamasu: Low-power performance is critical for any of the mobile applications. To continue scaling down cost-effectively while addressing leakage is a fundamental issue for the industry to move forward. Connectivity is another inflection point.
SSD: What kind of connectivity?
Nalamasu: Connectivity at a broader level of multiple devices. How to do it in a seamless, secure, and cost-effective way.
SSD: So this is similar to the Internet of things?
Nalamasu: Absolutely. There are about 6 billion devices out there. There is a lot of opportunity for these devices to interact.
SSD: If you’re putting together multiple process technologies on a 3D stack, does that extend your opportunity?
Nalamasu: Heterogeneous integration has been the subject of intense interest for the past 15 years. A 3D TSV is the first step toward realizing that potential, but there is a lot more opportunity and white space as we move from integrating silicon to silicon to integrating silicon to MEMS and other devices.
SSD: Does that extend your world, though?
Nalamasu: There are a lot of opportunities in both extending Moore’s Law and in serving other markets such as solar and LED. We look at opportunities to sustain the scalability, but we also look at new markets and opportunities. We do quite a bit of R&D.
SSD: Moving up a level of abstraction, how does the manufacturing industry change over time?
Nalamasu: It’s already a global industry. Consolidation will continue as the cost of building a fab goes up. Presumably, there will be some consolidation in the equipment provider industry as well, as the cost of R&D goes up.
– Ed Sperling