Process variation has been a major concern of IC manufacturers for many nodes now. As the industry goes below 20nm in concert with new transistor architectures and new materials for transistor channels, extending optical lithography and/or using EUVL, transitioning to 450mm wafers, more advanced wafer cleaning technologies, and so on — these multiple assaults on process variability will need to be addressed. Dr. Randhir Thakur, Executive VP and General Manager of the Silicon Systems Group at Applied Materials, discusses a three-pronged approach.