By Shannon Davis, Web Editor, Solid State Technology

Imagine being able to not only track and address equipment degradation in real time, but also analyze patterns in your factories’ equipment and address potential issues before they even present a problem.

It may sound too good to be true, but Microsoft’s Sanjay Ravi explained in Wednesday morning’s keynote that this innovation is becoming available now to manufacturers.

In his keynote “The Art of Possible: How Manufacturers are Leveraging Digital Technologies to Drive Business in a Connected World,” Mr. Ravi gave his audience a glimpse of the brave, new world that leveraging mobility, social, cloud and big data offers them, specifically siting product offerings and developments from Microsoft.

“The key priority is taking advantage of the connected business networks and enabling connected customer experience,” Mr. Ravi shared. Building a data culture across one’s organization can drive the right business processes and models, he explained.

He used examples from Samsung and AMD, who both utilized Cloud-based data analytics programs to reduce costs, manage energy and increase data warehouse performances by jaw-dropping percentages. AMD, for example, used Microsoft BI solutions to improve operational agility and was reportedly able to reduce resource support work needed by 90 percent. Samsung, he reported, analyzed 10 times more data to make more efficient decisions about energy management, using trend statistics and histograms – decreasing their costs by 75 percent.

“Given the explosion of the Internet of Things, all of our equipment can be connected,” said Mr. Ravi. “This means gathering big data from embedded devices and transforming big data into business information and insight.”

The implications are mind-boggling: manufacturers could anticipate production disruptions remotely and take corrective action anytime, anywhere.

And if that wasn’t enough to capture his audience’s imagination, Mr. Ravi also shared the Smart Elevator project Microsoft has in development. When used in an office setting, the Smart Elevators have the ability to learn office workers behaviors and analyze their Cloud-based work schedules to know 1) if they need to get on the elevator as they approach it and 2) where they will need to go once they get on the elevator. The result is a completely button-less elevator, an elevator that anticipates your schedule and is there right when you need it.

Whether it’s leveraging big data or Smart Elevators, the connected workplace isn’t science fiction: it’s possible and its potential is undeniable.

Sanjay Ravi during Wednesday morning’s keynote at SEMICON West 2014

By Jeff Dorsch

The microelectromechanical system (MEMS) device market is forecast to increase at a compound annual growth rate of 13 percent over the next five years, reaching $24 billion in 2019, according to Jean-Christophe Eloy, president and CEO of Yole Développement.

Microphones still account for half of the MEMS market, and STMicroelectronics remains the top supplier of mobile MEMS for smartphones and tablet computers, he told a TechXPOT session on Tuesday morning. While five suppliers dominate the mobile MEMS market, there are more than 50 companies competing for market share in automotive MEMS, Eloy noted.

Among other topics, Eloy said the “critical issue” in MEMS is “how to increase the chance of new devices to enter the market.”

Jack Young of Qualcomm Ventures discussed digital health applications for MEMS. His investment fund has put money into Fitbit and InvenSense, among other companies. Wearable gadgets have the potential to become fashion accessories, he said, noting that Fitbit has consulted with designer Tory Burch.

With MEMS-based wearable electronics, “your body is tweeting, your body is posting on Facebook all the time,” Young commented.

Tomas Bauer, senior vice president of sales and business development for Silex Microsystems, said the MEMS market is ready to move beyond automobiles and smartphones, and his company, a pure-play MEMS foundry, has a number of process technologies, such as Sil-Via and Met-Via, to fabricate new types of MEMS devices. Silex has also developed a through-glass via technology for some applications.

By Jeff Dorsch

Are we reaching the end of scaling?

Yes and no.

Let me explain.

The semiconductor industry has been able to “scale” the dimension features of chips steadily downward for decades. The good old, reliable planar bulk CMOS silicon process is on its way out, however, and scaling will have to go on without it. There seem to be no easy answers on how scaling will continue, with so many possibilities and variables to be considered.

Scaling might be an easier (not an easy) proposition if extreme-ultraviolet lithography systems were good to go for volume production of chips now, according to Brian Trafas, KLA-Tencor’s chief marketing officer. “EUV continued to be late to the marketplace,” he says. “It was going be for 14/16-nanometer, then 10-nanometer, now 7-nanometer.”

As EUV struggles forward, the industry is dealing with 193nm immersion lithography, which involves “more process steps, more cycle time,” Trafas says. “The focus on defectivity is really important. Everything needs to be defect-free.”

Dealing with all those defects is KLA-Tencor’s bread and butter, of course. “It’s good for us,” Trafas acknowledges.

Semiconductor Equipment and Materials International recognizes the general industry anxiety (or concern, at the minimum) about the future of scaling, and the topic is the subject of a Semiconductor Technology Symposium session on Wednesday, July 9. “Getting to 5nm Devices: Evolutionary Scaling to Disruptive Scaling and Beyond” will run from 9 a.m. to 12 noon in Moscone North. Attendees will hear from executives of GlobalFoundries, imec, Intel, Intermolecular, Sematech, and Soitec, along with professors at Stanford University and SUNY’s College of Nanoscale Engineering and Science. An Steegen, imec’s senior vice president of process technology, said at SEMI’s show-opening press conference on Monday that there are two different scaling roadmaps to consider – device scaling and system scaling. With the immersion lithography in use throughout the semiconductor industry, manufacturers are “battling complexity,” she said. Three-dimensional devices with FinFETs, 3D stacking in packaging, and emerging memory types could be answers to the scaling crisis, according to Steegen.

Once extreme-ultraviolet lithography becomes available, that will help the industry get through at least two process nodes, she added. FinFETs can “reset the roadmap,” Steegen said, and the industry has to “make sure the incentive is there” for 3DICs.

William Chen of ASE Group said of Moore’s Law and scaling, “The economic benefit is receding.” He looks toward system-in-package technology, with wafer-level packaging, 2.5D chip stacking, flip-chip packages, and wire bonding to help advance device scaling.

Robert Cappel, senior director of marketing at KLA-Tencor, said Monday, “Scaling is going to continue. It’s just going to be very, very hard.” Integrated device manufacturers need to collaborate with electronic design automation companies and fabless semiconductor companies to solve the scaling issues, he added.

The industry will need “virtual IBMs” – integrated efforts that can work on scaling from design to fabrication to packaging, Cappel asserted. That may come about when “the fabless powerhouses start to drive that,” he said.

Scaling still has several process nodes to get through. How that will be done will the subject of debate and interest for years to come.

By Jeff Dorsch

If semiconductor materials had a personal Facebook page, its status would be: It’s Complicated.

The days of all silicon, all the time are starting to dwindle. Can any material or combination of materials be as simple and useful as Si?

Some say the semiconductor future belongs to carbon. Graphene, the carbon material that has many wondrous attributes, is not a good semiconducting material, however. IBM Research predicts that carbon nanotubes will take over from silicon at the 5-nanometer process node, when traditional scaling will no longer work. CNTs should be the basic semiconductor material of the 2020s, according to IBM.

For the latter half of this decade, however, there will still be silicon and other materials, including compound semiconductors and semiconductor alloys. Molybdenum disulfide is gaining fans among materials scientists.

“The channel is getting thinner and thinner,” says Aaron Thean, vice president of process technology and director of logic development at imec. With silicon germanium, “processing gets a lot more complicated,” he notes. “With III-V compounds, the key challenge there is the gate stack.”

The 10nm process node is “very tough,” Thean says, and that may be where SiGe really starts to shine. At the 7nm node, there is a “positive outlook for germanium,” he adds.

Thean is bullish on carbon nanotubes as a workhorse material of the future. CNTs possess “the upside of grapheme, but none of the downside,” he says. “The bandgap starts to open.

“A lot of people are working on this,” including IBM, Thean says, noting that there are several types of CNTs.

Gallium arsenide remains a popular material for specialty applications. Gallium nitride, gallium-nitride-on-silicon and silicon carbide are finding more uses these days. Research is going in strontium titanate and other oxide-based semiconductors.

For most providers of IC foundry services, plain old CMOS silicon answers most of their needs, according to Brian Trafas, chief marketing officer of KLA-Tencor. New architectures, such as FinFETs, are presenting challenges for foundries and other chipmakers, he says. A few years out, there may be a requirement for III-V FinFETs, Trafas adds. “That’s probably a 5-nanometer decision,” he says.

In addition to the new materials being used in logic devices, “there could be big changes in memory types” that will call for new and different materials, Trafas says. Magnetoresistive random-access memories (aka magnetic RAM), resistive RAM, and other cutting-edge memory chip technologies are bidding to replace DRAMs, SRAMs, and NAND/NOR flash memory devices, he notes.

With the adoption of new materials, collaboration between semiconductor manufacturing equipment vendors and their customers becomes “more important,” Trafas concludes.

Back for its second visit to SEMICON West this year is Element Six, the supplier of gallium-nitride-on-diamond wafers and synthetic diamond heat spreaders. In May, the company touted the use of its GaN-on-diamond wafers by Raytheon as an alternative to GaN-on-SiC as part of the Defense Advanced Research Project Agency’s Near Junction Thermal Transport program for improving power density and thermal management in GaN radio-frequency devices.

In addition to a TechXPOT session on materials for 3D NAND flash memories this week, Semiconductor Equipment and Materials International is planning its annual Strategic Materials Conference for September 30 and October 1 in Santa Clara, Calif. The 2014 theme for the SMC is “Materials Matter—Enabling the Future of IC Fabrication and Packaging.”

By the way, you can find “semiconductor materials” on Facebook – it’s a link to the Wikipedia article on semi materials.