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The semiconductor business is defined by rapid technological changes and the need to maintain high levels of investment in research and development for new materials, innovative manufacturing processes for increasingly complex chip designs, and advanced IC packaging technologies.

However, since the 1980s, the long-term trend has been toward a slowdown in the annual growth rate of research and development expenditures according to data presented in the new, 2019 edition of IC Insights’ McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry (released in January 2019). Consolidation in the semiconductor industry has been a big factor contributing to lower growth rates for R&D expenditures so far this decade. In the most recent five-year span from 2013-2018, semiconductor R&D spending grew by CAGR of 3.6% per year, essentially unchanged from the 3.3% experienced from 2008-2013 (Figure 1).

Figure 1

IC Insights expects new challenges such as three-dimensional (3D) die-stacking technologies, growing complexities in end-use applications, and other significant manufacturing barriers to raise semiconductor R&D spending to a slightly higher growth rate of 5.5% per year in the 2018-2023 forecast period.

R&D spending trends discussed here cover expenditures by integrated device manufacturers (IDMs), fabless chip suppliers, and pure-play wafer foundries and do not include other companies and organizations involved in semiconductor-related technologies, such as production equipment and materials suppliers, packaging and test service providers, universities, government-funded labs, and industry cooperatives, such as IMEC in Belgium, the CAE-Leti Institute in France, the Industrial Technology Research Institute (ITRI) in Taiwan, and the U.S.-based Sematech consortium, which was merged into the State University of New York (SUNY) Polytechnic Institute in 2015.

With the value of more than 90 merger and acquisition agreements topping $250 billion since 2015, tremendous consolidation has been underway among semiconductor suppliers—many of them major IC companies—which have been cutting costs by hundreds of millions of dollars and leveraging “synergies,” meaning the elimination of overlapping expenditures (e.g., jobs, facilities, and R&D activities) in an attempt to achieve higher levels of productivity and greater profits. After rising just 1% in 2015 and 2016, total semiconductor R&D spending grew 6% in 2017 and increased 7% in 2018 to reach a new record- high level of $64.6 billion.

During the last 40 years (1978-2018), R&D expenditures have increased at a compound annual growth rate of 14.5%, slightly higher than the total semiconductor revenue CAGR of 12.0%. Since the year 2000, semiconductor R&D spending as a percent of worldwide sales has exceeded the 40-year historical average of 14.5% in all but four years (2000, 2010, 2017, and 2018). In these four years, lower R&D-to-sales ratios had more to do with the strength of revenue growth than weakness in research and development spending.

Vanguard International Semiconductor Corporation (VIS) and GLOBALFOUNDRIES (GF) today announced that VIS will acquire GF’s Fab 3E in Tampines, Singapore. The transaction includes buildings, facilities, and equipment, as well as IP associated with GF’s MEMS business. GF will continue to operate the facility through the end of 2019, providing a transition period to facilitate technology transfers for VIS and existing GF customers. Fab 3E currently manages a monthly capacity of approximately 35,000 8-inch wafers. The transaction amounts to $236 million USD and the transfer of ownership is set to be completed on December 31st, 2019.

VIS and GF have already reached consensus on the transfer of Fab 3E’s employees and customers. Both companies believe that employees are the most important assets of a company, so their interests should be put as the first priority during the transition; while ensuring no disruption to customers whose products are in production at the fab. Under this premise, VIS will extend employment offers to all employees currently working at Fab 3E, as well as continuously provide existing customers at Fab 3E with its foundry service, including MEMS customers.

“I appreciate the support of GF’s board and management team for this transaction, giving VIS an opportunity to continue expanding its capacity and reinforce momentum for future growth,” said Mr. Leuh Fang, Chairman of VIS. “Since its foundation, VIS has already had three separate experiences of successfully transforming a DRAM fab into a foundry fab. We believe this transaction is a win-win for both VIS and GF; and to VIS, it is also a decision that benefits all of our customers, employees, and shareholders. VIS will uphold its philosophy and principles to continue satisfying customers’ demands in capacity and technology, sustaining profitability and growth, and rewarding our shareholders.”

“This transaction is part of our strategy to streamline our global manufacturing footprint and increase our focus in Singapore on technologies where we have clear differentiation such as RF, embedded memory and advanced analog features,” said GF CEO Tom Caulfield. “Consolidating our 200mm operations in Singapore into one campus will also help reduce our operating costs by leveraging the scale of our gigafab facility in Woodlands. VIS is the right partner to leverage the Fab 3E asset going forward.”

VIS’s capacity has been fully utilized since 2018, and it is in the interests of its customers that VIS expands capacity to meet growing demands. The new fab is expected to contribute more than 400,000 8-inch wafers per year. This acquisition demonstrates the determination and commitment of VIS to accelerate capacity expansion.

Worldwide silicon wafer area shipments in 2018 increased 8 percent year-over-year to a record high, while 2018 worldwide silicon revenue jumped 31 percent during the same period, topping the $10 billion mark for the first time since 2008, reported the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry.

Silicon wafer area shipments in 2018 totaled 12,732 million square inches (MSI), up from the previous market high of 11,810 million square inches shipped during 2017. Revenues totaled $11.38 billion, compared to the $8.71 billion posted in 2017.

“For the fifth year in a row, annual semiconductor silicon volume shipments reached record levels,” said Neil Weaver, chairman of SEMI SMG, and Director, Product Development and Applications Engineering, at Shin-Etsu Handotai America. “Despite strong demand and the impressive gain in revenues last year, the market still remains below the market high set in 2007.”

Annual Silicon* Industry Trends
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
Area Shipments (MSI)
8,661
8,137
6,707
9,370
9,043
9,031
9,067
10,098
10,434
10,738
11,810
12,732
Revenues ($B)
12.1
11.4
6.7
9.7
9.9
8.7
7.5
7.6
7.2
7.2
8.7
11.4

Source: SEMI (www.semi.org), January 2019

*Total Electronic Grade Silicon Slices Excluding Non-Polished Wafers. Shipments are for semiconductor applications only and do not include solar applications.

*Shipments are for semiconductor applications only and do not include solar applications

All data cited in this release includes polished silicon wafers, such as virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped to end users.

Silicon wafers are the fundamental building material for semiconductors, which, in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin, round disks are produced in various diameters – from one inch to 12 inches – and serve as the substrate material on which most semiconductor devices, or chips, are fabricated.

The Silicon Manufacturing Group (SMG) is a sub-committee of the SEMI Electronic Materials Group (EMG) and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

North America-based manufacturers of semiconductor equipment posted $2.11 billion in billings worldwide in December 2018 (three-month average basis), according to the December Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI. The billings figure is 8.5 percent higher than the final November 2018 level of $1.94 billion, and is 12.1 percent lower than the December 2017 billings level of $2.40 billion.

“December billings of North American equipment manufacturers ended 2018 on a positive note,” said Ajit Manocha, president and CEO of SEMI. “Spending for logic and foundry offset the decline in memory investments for the month.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg.)
Year-Over-Year
July 2018
$2,377.9
4.8%
August 2018
$2,236.8
2.5%
September 2018
$2,078.6
1.2%
October 2018
$2,029.2
0.5%
November 2018 (final)
$1,943.6
-5.3%
December 2018 (prelim)
$2,108.9
-12.1%

Source: SEMI (www.semi.org), January 2019

SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions. SEMI also has a long history of tracking semiconductor industry fab investments in detail on a company-by-company and fab-by-fab basis in its World Fab Forecast and SEMI FabView databases. These powerful tools provide access to spending forecasts, capacity ramp, technology transitions, and other information for over 1,000 fabs worldwide. For an overview of available SEMI market data, please visit www.semi.org/en/MarketInfo.

Annual semiconductor unit shipments, including integrated circuits and optoelectronics, sensors, and discrete (O-S-D) devices grew 10% in 2018 and surpassed the one trillion unit mark for the first time, based on data presented in the new, 2019 edition of IC Insights’ McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry. As shown in Figure 1, semiconductor unit shipments climbed to 1,068.2 billion units in 2018 and are expected to climb to 1,142.6 billion in 2019, which equates to 7% growth for the year.  Starting in 1978 with 32.6 billion units and going through 2019, the compound annual growth rate for semiconductor units is forecast to be 9.1%, a very impressive growth figure over 40 years, given the cyclical and often volatile nature of the semiconductor industry.

Figure 1

Over the span of just four years (2004-2007), semiconductor shipments broke through the 400-, 500-, and 600-billion unit levels before the global financial meltdown caused a big decline in semiconductor unit shipments in 2008 and 2009.  Unit growth rebounded sharply with 25% growth in 2010, which saw semiconductor shipments surpass 700 billion devices. Another strong increase in 2017 (12% growth) lifted semiconductor unit shipments beyond the 900-billion level before the one trillion mark was achieved in 2018.

The largest annual increase in semiconductor unit growth during the timespan shown was 34% in 1984, and the biggest decline was 19% in 2001 following the dot-com bust.  The global financial meltdown and ensuing recession caused semiconductor shipments to fall in both 2008 and 2009; the only time that the industry experienced consecutive years in which unit shipments declined.  The 25% increase in 2010 was the second-highest growth rate across the time span.

The percentage split of total semiconductor shipments is forecast to remain heavily weighted toward O-S-D devices in 2019 (Figure 2).  O-S-D devices are forecast to account for 70% of total semiconductor units compared to 30% for ICs.  This percentage split has remained fairly steady over the years.  In 1980, O-S-D devices accounted for 78% of semiconductor units and ICs represented 22%.  Many of the semiconductor categories forecast to have the strongest unit growth rates in 2019 are those that are essential building-blocks for smartphones, automotive electronics systems, and devices that are used in computing systems essential to artificial intelligence, “big data,” and deep learning applications.

Figure 2

 

Global shipments of large thin-film transistor (TFT) liquid crystal display (LCD) panels rose again in 2018 despite concerns of over-supply in the market. In particular, area shipments increased by 10.6 percent to 197.9 million square meters compared to the previous year, driven by TV and monitor panels, according to IHS Markit (Nasdaq: INFO).

Fierce price competition in large 65- and 75-inch display panels was ignited as Chinese panel maker BOE started the mass production of the panels in 2018 at its B9 10.5-generation facility. “With BOE operating the 10.5-generation line, panel makers have become more aggressive on pricing since early 2018 to digest their capacity,” said Robin Wu, principal analyst at IHS Markit. “Large panels are still more profitable than smaller ones.”

Rising demand for gaming-PC and professional-purpose monitors boosted shipments of high-end, large panels. “Some panel makers have allocated more monitor panels to the fab, replacing existing TV panels, to make up for poor performance of that business,” Wu said.

Demand for other applications, which include public, automotive and industrial displays, recorded the highest growth rates of 17.5 percent by area and 28.6 percent by unit. “Panel makers view these applications as a new cash cow that can compensate for the sharp price erosion in main panels for TVs, monitors and notebook PCs,” Wu said.

LG Display led the area shipments of large display panels, with a 21 percent share in 2018, followed by BOE (17 percent) and Samsung Display (16 percent). BOE boasted the largest unit-shipment share of 23 percent, followed by LG Display (20 percent) and Innolux (17 percent), according to the Large Area Display Market Tracker by IHS Markit.

Large TFT LCD panel shipment growth is expected to continue in 2019. The preliminary forecast for unit shipments of three major products indicates that panel makers will continue to focus on the monitor and notebook PC panel businesses, increasing shipments by 5.3 percent and 6.6 percent, respectively, over the year, while shipments of TV panels are forecast to grow just 2.6 percent.

In 2019, three new 10.5-generation fabs – ChinaStar’s T6, BOE’s second fab and Foxconn/Sharp’s Guangzhou line – are expected to start mass production. All of them are assigned to manufacture TV panels, further boosting TV panel supply. “As the TV panel business is predicted to remain tough, panel makers, who enjoyed relatively better outcomes with monitor and notebook PC panels in 2018, will likely focus on the IT panel businesses,” Wu said.

The Large Area Display Market Tracker by IHS Markit provides information about the entire range of large display panels shipped worldwide and regionally, including monthly and quarterly revenues and shipments by display area, application, size and aspect ratio for each supplier.

By Ajit Manocha

Last year the industry posted another remarkable double-digit revenue growth year. IC shipments eclipsed one trillion units for the first time and continued to enable an ever-expanding array of silicon intensive-applications.

2018 was also a pivotal year of transformation at SEMI. Setting our sights firmly on building more value for SEMI members, we doubled down on priorities I established this time last year. We advocated intensively on global trade policies, industry talent needs, and critical environment, health and safety (EHS) concerns. To underpin our efforts around talent, we took the bold step to reinvigorate the industry’s identity with a dynamic image campaign. Above all, we targeted critical industry-wide issues to help us realize the ambition of becoming a trillion-dollar industry in the next decade.

Workforce Development

Redefining our approach to talent development in 2018 was and remains a top priority. A diverse, highly skilled workforce is crucial to the industry’s ability to innovate. Last year we ramped up a number of  SEMI High Tech U (HTU) programs to inspire young people and attract them to careers in high-tech manufacturing. To date, more than 130,000 students have been touched by HTU – through student or teacher programs.

Over the past year, we designed a new university outreach program and established partnerships with 100 institutions. We established Workforce Pavilions at SEMICON events in Southeast Asia, the U.S., Taiwan, Europe and Japan for students to explore career opportunities and meet with recruiters. We thrilled at seeing sponsors hire young talent at SEMI events. This year, all SEMICONs worldwide will feature Workforce Pavilions.

SEMI also formalized its commitment to Diversity and Inclusion (D&I) with the establishment of a D&I council to shape new programs including the recently launched Spotlight on SEMI Women. To localize and fully optimize our D&I programs, we established regional workforce councils in every region we serve.

We unveiled the SEMI Mentoring Program to support students and young professionals on this journey by facilitating one-on-one mentoring relationships with industry professionals. Hundreds of mentees have enrolled. But we still need more mentors.  I urge you to join the program.

During the year, SEMI also expanded its workforce staff and developed a comprehensive workforce strategy with programs that engage students as early as elementary school and inspires them through high school and college. The program provides pathways to professional careers, building a pipeline to fill the short-term and long-term talent needs of the industry.

Industry Image Campaign

As we developed the comprehensive workforce development program, we knew we had to refresh the industry’s image and appeal to the next generation through contemporary media and communications channels. So we recently launched a bold, innovative campaign to raise industry awareness and attract students and recent graduates to careers in semiconductor manufacturing.

Our You’re Welcome campaign is a novel, creative approach that blends entertainment, media and storytelling to excite students about the industry. The campaign went viral immediately and within weeks had more than 5.5 million social media impressions and 2.3 million video views.

Trade Policy Advocacy

Rising trade tensions between the U.S. and China catapulted global trade policy to the forefront of industry concerns in 2018. Since the tariffs have taken force, semiconductor companies have faced higher costs, greater uncertainty, and difficulty selling products abroad. The tariffs have forced many SEMI member companies to pause or rethink their investment strategies.

SEMI quickly engaged U.S. policymakers and provided resources for SEMI members. We formed a member trade task force, staged trade compliance seminars in China, and convened meetings with over 110 U.S. congressional, agency and administration officials, and provided testimony on the importance of the free trade to the industry.

SEMI continues to educate policymakers about the critical importance of free and fair trade, open markets, and respect and enforcement of IP for all players in the global electronics manufacturing supply chain. As part of this initiative, we distributed “10 Principles for the Global Semiconductor Supply Chain in Modern Trade Agreements” and encouraged their adoption in various trade negotiations. These principles outline the primary considerations for balanced trade rules that benefit SEMI members around the world, strengthen innovation and perpetuate the societal benefits of affordable microelectronics.

Environment, Health and Safety

Environmental regulations are proliferating globally even as advanced semiconductor manufacturing technology relies increasingly on a host of new materials. With dozens of new fabs and fab line upgrades, our industry must align on best practices, sensibly respond to materials restrictions, and renew efforts toward sustainable manufacturing.

That’s why the revitalization of SEMI EHS efforts became another priority in 2018. Two months ago, we hosted the inaugural EHS Summit at SEMI Headquarters. Fully, 70 EHS professionals and company executives met to form the basis for the future SEMI EHS program.

The Year Ahead

Despite a softening in the market, compounded by Apple’s first-ever announcement of a revenue decline in 16 years, a geopolitical whirlwind on trade and an extended shutdown of much of the U.S. government, the future is bright.

At SEMI’s annual Industry Strategy Symposium (ISS 2019) in Half Moon Bay, Calif. in early January,  the sense of optimism was palpable. In her keynote address, Dr. Ann Kelleher, Sr. VP and General Manager, Technology and Manufacturing Group, at Intel, observed that data is powering the fourth industry revolution and the expansion of compute. With customers expecting continual improvements in applications, Kelleher highlighted the tremendous opportunity for the chip industry to meet these expectations.

At ISS 2019, we announced a Memorandum of Understand between SEMI and imec. The MOU will enable us to accelerate our members’ engagement in SEMI’s Smart vertical market platforms, in particular Smart MedTech and Smart Transportation. Our partnership with imec will also allow us to boost SEMI Standards activities in non-CMOS technologies, deepen technology roadmap efforts and augment our SEMI Think Tank initiative in thought leadership at a global level.

Over the course of this coming year, will we begin our global rollout of key building blocks of our comprehensive workforce development program to engage schoolchildren as young as 10 and learners all the way to veterans who return to the workforce. We are now able, with the invaluable help of our Workforce Development Council and the passionate engagement of many SEMI member companies, to offer a solution to the talent crisis in our industry.

We will continue to be the leading voice for our members and the end-to-end semiconductor supply chain across Talent, Trade, Tax and Technology as we work to ensure free, fair trade that protects IP while preserving vital access to markets to grow the supply chain.

Vertical Market Platforms

Our vertical market platforms are an important part of this growth. For example, in Smart MedTech, SEMI looks forward to working with the Nano-Bio Materials Consortium to advance human monitoring technology for telemedicine and digital health after winning $7 million to fund the renewed program. In Smart Transportation, we will leverage the Global Automotive Advisory Council (GAAC) we formed last year to represent the full automotive supply chain and the Smart Transportation and Smart Automotive forums featured at all our SEMICON events to enable the industry to identify and seize opportunities in autonomous driving.

At ISS 2019, Sujeet Chand of Rockwell Automation noted that “digitization will grow faster in the next 10 years than it did in the past 50,” a trend calling for semiconductor fab architectures that transform data into business value. We will continue to bring the industry together at our Smart Manufacturing venues to help uncover ways to deploy deep learning, edge computing and other Smart technologies to deliver this value and meet the challenges of automation as artificial intelligence’s (AI) sprawling influence reshapes industries including manufacturing.

I am filled with optimism and thrilled about the opportunities I see on the horizon for our members as we build on our 2018 accomplishments to enable your prosperity in 2019 and beyond. My heartfelt thanks to all of you for your participation in our programs and events.

I look forward to another successful year as we connect, collaborate and innovate together!

Ajit Manocha is president and CEO of SEMI. 

Soitec (Euronext Paris), a designer and manufacturer of semiconductor materials, announced today an expanded collaboration with Samsung Foundry to ensure the volume supply of fully depleted silicon-on-insulator (FD-SOI) wafers. This agreement extends the current  partnership and provides a solid foundation for both companies to strengthen the FD-SOI supply chain and guarantee high-volume manufacturing for customers.

With the leadership from the two companies, today FD-SOI is one of the standard technologies for cost-effective, low-power devices used in high-volume consumer, 4G/5G smartphones, IoT, and automotive applications. The agreement is built on the existing close relationship between the companies and guarantees wafer supply for Samsung’s FD-SOI platform starting with 28FDS process.

“This strategic agreement validates today’s high-volume manufacturing adoption of FD-SOI,” said Christophe Maleville, Soitec’s Executive Vice President, Digital Electronics Business Unit. “Soitec is ready to support Samsung’s current and long-term growth for ultra-low power, performance-on-demand FD-SOI solutions.”

FD-SOI relies on a very unique substrate whose layer thickness is controlled at the atomic scale. FD-SOI offers remarkable transistor performance in terms of power, performance, area and cost tradeoffs (PPAC), making it possible to cover low-power to high-performance digital applications with a single technology platform. FD-SOI delivers numerous unique advantages including the ability to mitigate process, temperature, voltage and aging variations through body bias, near-threshold supply capability, ultra-low sensitivity to radiation, and very high intrinsic transistor speed, making it most likely the fastest RF-CMOS technology on the market.

“Samsung has been committed to delivering transformative industry leading technologies.  FD-SOI is currently setting a new standard in many high-growth applications including IoT with ultra-low-power devices, automotive systems such as vision processors for ADAS and infotainment, and mobile connectivity from 5G smartphones to wearable electronics,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “Through this agreement with Soitec, our long-term strategic partner, we hope to lay the foundation for steady supply to meet high-volume demands of current and future customers.”

IC Insights is in the process of completing its forecast and analysis of the IC industry and will present its new findings in The McClean Report 2019, which will be published later this month.  Among the semiconductor industry data included in the new 500-page report is an analysis of the correlation between IC market growth and global GDP growth.

Figure 1 depicts the increasingly close correlation between worldwide GDP growth and IC market growth through 2018, as well as IC Insights’ forecast through 2023.

Figure 1

Over the 2010-2018 timeframe, the correlation coefficient between worldwide GDP growth and IC market growth was 0.86 (0.91 excluding memory in 2017 and 2018), a strong figure given that a perfect positive correlation is 1.0.  In the three decades previous to this timeperiod, the correlation coefficient ranged from a relatively weak 0.63 in the early 2000s to a negative correlation (i.e., essentially no correlation) of -0.10 in the 1990s.

IC Insights believes that the increasing number of mergers and acquisitions, leading to fewer major IC manufacturers and suppliers, is one of major changes in the supply base that illustrates the maturing of the industry and has helped foster a closer correlation between worldwide GDP growth and IC market growth.  Another reason for a better correlation between worldwide GDP growth and IC market growth is the continued movement to a more consumer driven IC market.  IC Insights believes that 20 years ago, about 60% of the IC market was driven by business applications and 40% by consumer applications with those percentages being reversed today.  As a result, with a more consumer-oriented environment driving electronic system sales, and in turn IC market growth, the health of the worldwide economy is increasingly important in gauging IC market trends.

By Rohit Sharma

Constant coverage of an invigorating topic like machine intelligence in the media often urges us to consider its use in EDA technology. As is often the case, there are many myths and falsehoods that consume our time and effort when trying to apply machine intelligence to EDA. This article aims to uncover the myths and to provide helpful advice on applying machine intelligence to your EDA project or product.

Value Proposition

First, there needs to be a clear value proposition for adding machine intelligence to an EDA product. Using machine intelligence to create a me-too product adds no value. EDA customers are too busy to understand or care about an EDA tool’s underlying technology. They just want to use the tool and get results. If the tool delivers value, if it delivers tangible benefits, then they’ll use it. Otherwise, they won’t.

Currently, EDA tool developers are already experimenting with AI and machine intelligence without considering this fundamental truth – without a higher-end objective. AI must deliver something better or new, whether a speed advantage, a performance advantage, new features, new insights, or perhaps even something pleasantly surprising. Before you write a single line of AI-enhanced code, you need to clearly understand how AI will enhance the product. What is the value proposition?

Use Model

There’s a major barrier to customer adoption of AI and machine intelligence technology for EDA tools: EDA users are averse to make decisions based on probabilistic results. Instead, half a century of EDA tool use has conditioned them to expect deterministic outcomes from their tools.

Back in 2003, a prominent visionary and EDA investor was quoted in an interview, saying: “If I open my eyes five years from now, all static analysis in VLSI will be statistical.” Many EDA luminaries have been proven wrong over time for betting that EDA users will accept statistical results. As enthusiastic as I am about using machine intelligence to improve EDA tools, I must urge caution based on the history of EDA failures that employed a probabilistic use model. Decision-makers and EDA tool users want to see deterministic answers to questions about yield or slack, not probabilistic ones.

Our experiences at Paripath in developing the PASER (Paripath Accelerated Simulation Environment) tool also bear this out. We discovered that delivering results 50x faster but with 92% accuracy was simply not good enough for end users. EDA users only started to use PASER when its answers became 98+% accurate. To be adopted in the production flow, the tool had to deliver 99% accuracy.

Data Engineering

There are specific ways to achieve these accuracy goals. The first is data engineering. Machine intelligence is a new approach to EDA tool development and it needs to be trained on a data set. If the data is poor or incomplete, training will create an inaccurate model. Fundamental software-development rules still apply. Garbage in, garbage out.

Without good training data, there’s no way for you to build good neural-network models. If you train a model with garbage data, you’ll get a garbage model. You must cleanse the data before you use it for training. Otherwise, the model will draw inaccurate conclusions and customers will not use your tool. The model is not to blame here. The model’s not wrong. The problem lies in poor data engineering, poor data cleansing, and a lack of discipline to prepare input data.

High Dimensionality

Next, machine intelligence has a unique ability to quickly solve problems of high dimensionality. Pure EDA problems often have high dimensionality. Over the years, EDA developers have perfected the art of segmenting the problems into sequencing solutions with lower dimension. Machine intelligence technology can handle problems with thousands of dimensions, but you need to be careful when tackling problems that have high dimensionality. Too many dimensions can produce confused or inaccurate results with AI and deep-learning technology.

It helps to visualize the problem and to analyze the data set before using the data to train an AI-enhanced EDA tool. Several visualization methods can help. For example, t-SNE (t-Distributed Stochastic Neighbor Embedding) lets you reduce a data set’s dimensionality from a very large number to a much lower number. Figure 1 shows a high-dimension dataset with a dimensionality of 2000, which has been reduced to a low dimensionality of 3.

Figure 1: Visualizing the Data Set with Lower Dimensionality

Reducing the dimensionality of a data set to 3 using t-SNE and visualization allows you to quickly see whether the data set defines an easy or a difficult problem. If the problem is difficult, you’ll likely need to lower the problem’s and the data set’s dimensionality before using the data to train a neural network.

Technology Selection

One factor that determines whether it will be easy or difficult to incorporate machine intelligence into your EDA tool is your choice of AI development tools. AI researchers have developed a long list of frameworks, libraries, and languages that they use to develop AI and machine-learning software. Frameworks and libraries such as TensorFlow, Caffe and MXNet are most popular for developing deep-learning models.

However, these tools are not yet popular with the EDA development community. The languages of choice in the EDA community are traditionally C and C++ for development and Tcl for prototyping and creating user interfaces. The rest of the software world has moved on to newer development languages such as Python, Java, R, and such. Moreover, machine-learning development segments into two distinct processes: training (i.e. generating the model) and inference (i.e. using the model).

Another question to consider is where to generate the model – at the vendor site or the customer site?

Consequently, fitting AI and deep-learning development into EDA development environments can feel like fitting a square peg into a round hole. You may need to create corners in your hole.

EDA is a very small player in the overall software market. Relatively few software developers are familiar with writing EDA tools. It’s best to select AI and deep-learning development tools that can provide some sort of interface that’s compatible with EDA’s development tools of choice. Some AI frameworks have lower-level C and C++ interface layers that provide a familiar entry point for experienced EDA developers.

At Paripath, we chose TensorFlow for exactly this reason. TensorFlow has a lower-level C/C++ interface. Although the resulting development path becomes a longer one using this approach, it’s a more familiar path for EDA developers and therefore it’s a path that can ultimately lead your EDA development team to success. An elaborate study of comparing these frameworks has been published in the book Machine Intelligence in Design Automation.

Integration into Legacy Systems

When you understand the value that you expect machine intelligence to add to your new EDA tool, when you’ve cleansed and then analyzed the data set, and when you have selected an appropriate set of development tools, you’re finally ready to add machine intelligence to your EDA development. There are two use models for AI-enhanced EDA tools. The first uses a trained model to guide the EDA tool’s decision-making. In this use case, the trained neural network doesn’t change. The software’s accuracy doesn’t improve with use unless the company that developed the EDA tool retrains the underlying neural network. This use case follows the familiar, existing use case associated with EDA tools developed using deterministic algorithms.

For the second use case, the end user is able to retrain the underlying neural network, which allows the EDA tool to produce better, more accurate results over time. This use case produces a win/win situation because end users are able to hone their tools and improve them over time, without help from the EDA tool vendor’s application engineers. If the retrained models are also sent back to the EDA developer for incorporation into newer versions of the tool, all users benefit from other users’ training data.

It’s not clear how you’d support this second use case in the current EDA business environment where most data sets are proprietary and are carefully guarded. Most large EDA tool customers want to keep their data in house under tight control. Even with this somewhat restrictive situation, however, EDA tools benefit from the incorporation of machine intelligence because each EDA tool customer can customize the tool and improve its results.

Machine intelligence has much to add to EDA tools’ capabilities. Only time will tell if the customers want and will accept these new capabilities.

Rohit Sharma, founder and CEO of Paripath Inc., is an engineer, author and entrepreneur. He has published many papers in international conferences and journals. He has contributed to electronic design automation domain for over 20 years learning, improvising and designing solutions. He is passionate about many technical topics including machine learning, analysis, characterization, and modeling. It led him to architect guna – an advanced characterization software for modern nodes. 

Sharma has written a book titled “Machine Intelligence for Design Automation.” You can download code examples and other information here.

This originally appeared on the SEMI blog.