Semiconductor makers face process tradeoffs

Semiconductor makers face process tradeoffs

By Hank Hogan

NEW YORK — Even in semiconductor manufacturing, the saying still holds true: the whole is greater than the sum of the parts. Semiconductor processing is complex, cycling through hundreds of individual steps to create an integrated circuit. The interaction between these steps can impact contamination control.

Among other things, Intel Corp.`s Portland Technology Development group creates advanced processes by integrating separate manufacturing elements into a robust scheme. While all of the high probability interactions between steps are characterized, it`s costly and time consuming to investigate all possible effects. Unfortunately, low probability events do happen.

Bob Gasser, 0.18 micron program manager in the development group, recalls a case of problems linked to photoresist outgassing. The photoresist was required for feature imaging, but the outgassing created thin film defects and attenuated or blocked implants, leading to circuit performance abnormalities. This in-process contamination isn`t an isolated event.

“We are finding that most of the contaminants come from the things we put wafers in or materials that we apply to wafers, rather than the fab environment itself,” notes Gasser.

He spoke about these issues in a talk entitled, “Process Integration Overview: Development and High-Volume Manufacturing of Microprocessor Products” at an American Vacuum Society symposium in New York in November 1998.

However, what goes on can help as well as hinder. At the same meeting, Rebecca J. Gale, a senior member of the technical staff of Texas Instruments` Silicon Technology Development group in Dallas, gave a talk entitled, “Pattern/Etch/Clean Process Interactions for 0.18 Micron CMOS Gate Formation.” In her presentation, she noted the use of chlorine during the critical gate etch. The chlorine wasn`t in the mix because it helped remove gate material.

“Adding the chlorine didn`t really have a significant impact on the etch characteristics, but it did make it easier to strip the residue,” comments Gale.

Gale also mentioned that in some cases she observed the growth of an oxide during a post-etch clean. Put in to remove residue, the clean itself attacked part of the circuit. That damage, however, was hidden because of the oxide grown during the cleaning process.

As seen in such examples, unintended consequences can impact contamination control and influence process development tradeoffs. The issue may become more acute as advanced processes are developed. There is a two-year gap between when photolithographic tools will be needed and when they will be available. So the industry is looking into such things as using a controlled overetch to allow smaller transistor gates to be reliably and economically created.

But such techniques may lead to other contamination sources. For instance, Gale discussed a problem that can be caused by decreasing linewidths. As feature sizes shrink, photoresist must become thinner. With 248 nanometer photolithography, the 0.13 micron process generation will have to operate using resist that is only 0.3 micron thick, as opposed to today`s standard 0.5 micron or thicker photoresist layers.

Such thin resist will not be able to protect underlying films during an etch, so one solution is to use another layer, a hard mask, below the resist. The image would be transferred to the hard mask by etching it, and then that would be used to etch the actual device film.

However, this creates potential contamination. It isn`t so much with the hard mask itself, but rather what happens after it has fulfilled its purpose. Because of the difficulty with accurately measuring feature size, it may be necessary to probe the surface to measure critical feature dimensions. That`s because electrical methods may be the only way to accurately measure very small features at a high enough throughput. But the combination of probing and a hard mask may lead to problems.

“If you probe through this hard mask, you`re going to break off chunks of the dielectric and it`s going to leave residue,” notes Gale.

Gale thinks a wet chemical clean will probably remove any contamination, but such a clean is not compatible with some areas of the process, such as the backend interconnection. The overall problem in those areas, however, can be lessened by correct process integration. For instance, the interconnection photolithography may require an inorganic antireflective layer, which is also a contamination concern. It may be possible to use a hard mask as an inorganic antireflective layer. Combining the two functions eliminates one contamination source.

Accomplishing such creative process integration requires careful planning and a bit of tinkering. As was the case with the foregoing implant blockage problem, sometimes it`s the low probability events that turn out to be an issue. Extensive characterization may not be the quickest way to ferret out which low probability occurrence will actually occur. Gasser of Intel notes that sometimes it may be quicker to integrate a new module into a process, and then see if there are any unintended consequences. At that point, changes can be made to eliminate contamination.

However, he also points out that semiconductor manufacturers need help to do this. They know the process being used and what new modules are being integrated to advance the manufacturing technology. What may be a bit of a mystery are the materials being used. Chemical, tool, and equipment suppliers need to provide the data to successfully fit the pieces of the process jigsaw puzzle together, and that may not be an easy task.

As Gasser observes, “suppliers need to characterize the materials that they supply for contaminants, outgassing, and potential interactions — such as corrosion, leaching — with other materials that will come in contact with the materials that they supply.”


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.