Process and handling challenges for known good die

As the use of unpackaged semiconductor devices becomes more widespread, the need for the reliable availability of KGD becomes increasingly important.

In response to escalating requirements for increased circuit densities, smaller product form factors and lower cost for high-volume products, electronics manufacturers are turning to the use of unpackaged semiconductor die. Direct die-to-substrate applications, such as multi-chip modules (MCMs), flip-chip on board (FCOB), direct chip attach (DCA) and chip scale packaging (CSP), all offer increasingly robust mechanisms for high-density integration of raw die into higher-level assemblies and sub-assemblies. Used in everything from cellular phones to automobiles, these techniques are revolutionizing the communications, computer, automotive, aerospace and consumer electronics industries.


Figure 1. Accurate interpretation of the wafer map and precise wafer positioning are critical to the die-picking process.
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However, as the use of unpackaged semiconductor devices becomes more widespread, the need for the reliable availability of known good die (KGD) becomes increasingly important. In essence, KGD are unpackaged die that offer equivalent reliability levels to packaged and tested semiconductors. While KGD represent a critical cornerstone for the economic and technical viability of high-volume die-to-substrate applications, the efficient production of KGD requires tight integration of a number of critical steps for handling, inspecting, testing and outputting die.

Driving Forces for KGD

The primary driving force for KGD is the high cost associated with the incidence of uncontrolled defects that are not discovered until after assembly. Because applications using direct die-attach methods inherently pack more functions into a smaller form factor, the consequence of errors rises with the increased density.

For example, if a module is designed with 12 components, all having a 95 percent probability of being good, the chances of the module being good is equal to 0.95 raised to the 12th power. This represents a low expectation of only 54 percent that the module itself will be good. Therefore, if only one of every two modules tests positive, then the cost of rework and/or scrap can completely overwhelm the benefits of using direct die-attach in the first place.

Worse yet, the prospect of reworking each assembled module can be prohibitively expensive, or even impossible, because many die-attach applications use encapsulation techniques such as underfill, dam-and-fill or glob-top to permanently enclose and protect the assembled die. Further complicating the situation is the fact that failures of even relatively inexpensive die can lead to large costs of scrap and rework once they have been soldered and encapsulated onto a shared substrate with more expensive components.

To counter these concerns, many leading semiconductor suppliers are now offering formalized KGD programs, enabling customers to purchase pre-screened and tested die designed to deliver quality results in the parts-per-million (PPM) range.

KGD Processing Requirements


Figure 2. A test nest offers a wide range of electrical test capabilities on a single machine.
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Generating reliable KGD requires a dedicated process that entails more than traditional testing of the die while in a wafer state. Not only is the ability to test unsingulated die often technically limited, but even if full tests can be run in a wafer state, the process of cutting and singulating the die can damage some of the die after wafer-state testing. Oftentimes, high-current or high-voltage tests simply cannot be performed while the die are in a wafer state because of risk of damage to adjacent die.

In addition, if they are not conducted concurrently with the testing process, subsequent handling steps required to prepare the die for production use can also inject additional failures. Even if the downstream assembly process could be set up to pick and place die directly from wafer, errors can still occur with incorrectly interpreting the wafer map, resulting in the inadvertent selection and placement of bad die.

Therefore, the most effective methods for generating reliable KGD involve continuous, integrated processes that start from a wafer state and end with only screened and tested die in a production-ready format. Such a comprehensive integrated KGD process typically must address:

  • Inputting singulated wafers into the process
  • Reading the wafer map and scanning for pre-tested die
  • Conducting an automated vision-based inspection for physical damage
  • Picking pre-screened die from the wafer
  • Orienting and aligning the die
  • Electrically probing and functionally testing each die
  • Sorting and separating “passed” and “failed” die
  • Reorienting and flipping as required
  • Outputting to required format (tape, tray, etc.).

While the combining of all KGD handling and test functions into a single machine can significantly reduce total equipment costs and improve floor-space utilization, a number of key issues and challenges should be overcome to ensure both the efficiency and integrity of the overall KGD process.

Wafer Positioning and Die-picking: The process for accurately reading the wafer map, inspecting and precisely picking the die has become more challenging. This must start with precision positioning of the wafer under the pick-up point, including accurate wafer tensioning and push-pin mechanisms (Figure 1). Both the amount of tension applied to the film during stretch and the degree of engagement by the push pin from under the wafer should be fully programmable to accommodate different requirements. Typically, the pins should not be allowed to pierce the film or make contact with the individual die.


Figure 3. Some production processes may require that the KGD be output to trays for subsequent use.
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While most KGD applications will involve loading wafers from cassette and picking die from the wafers, KGD systems should also be designed to smoothly accommodate loading die from waffle packs for optimal process flexibility.

The pick-up robotics must combine a high rate of throughput speed with positioning accuracy and also should incorporate the flexibility for reorienting or flipping the die before depositing in the system's test nest. In addition, because all subsequent inspection and testing processes depend upon accurate positioning, the alignment, orientation and registration of the die within the test nest are also critical factors.

Inspection: In addition to ink dot recognition, mark inspection and orientation checking, a KGD machine's integrated vision-based system also needs to provide sufficient flexibility to screen for a variety of physical characteristics and defects. For example, certain locations on a particular die may not be as susceptible to damage from scratches as other areas. A process engineer may need to focus specific parts of the inspection process on screening for cracks at the corners, while other parts of the process are dedicated to inspecting for surface scratches, bump integrity, chipping and debris.

In these instances, it is helpful from a throughput and simplicity standpoint to be able to tailor the inspection level for specific requirements. By providing as many as 20 different inspection windows, with the ability to individually set the sensitivity levels and feature-finding parameters for each window, modern KGD systems allow for custom configuration of the entire inspection process. In most cases, the user can download detailed inspection criteria and pass/fail parameters and/or step the inspection system through a quick “teaching mode” operation to fine tune the process. By using integrated graphic user interface software to draw a box around specific features, a process engineer can hone in on critical features and adjust the vision system's sensitivity for individual parameters.

Electrical Testing: Electrical testing represents the heart of KGD processing and also presents some of the greatest challenges to system designers. This is because of the variety of tests and cycle times that may be required for different devices. In addition, because physical contact must be made with the die to conduct electrical testing, it is imperative that the probe mechanisms be precisely controlled.

Because multiple tests may be required for each die and cycle times may vary, it is not practical to design a KGD system with a single one-size-fits-all electrical test function. For this reason, today's most effective KGD system designs tend to combine several electrical test stations within the same machine, often by leveraging proven rotary-indexing automation methods that enable tight synchronization between all of the stations (Figure 2). Depending on the process requirements, multiple test stations can allow for either sequential running of different tests on the same die or for boosting throughput by running parallel tests on different die.

When running multiple tests on the same die, it is critical to consider and carefully manage the potential impacts of applying the test probes. Each time a die is probed, the physical contact from the probes will have a tendency to leave scrub marks. While in most instances a single set of scrub marks will have no negative effect, there is the possibility that repeated probing can result in physical damage of the contact area. To counter these possibilities, some KGD systems have been designed to bring a single set of probes into contact with the die and then have the probe card travel with the die from station to station. In this fashion, subsequent tests can be carried out by connecting to the probe card, without the risk of creating multiple scrub marks on the die.

It can also be beneficial to incorporate options for controlling the surrounding environmental conditions during the electrical testing. For example, the ability to maintain a nitrogen environment within the test chamber can significantly reduce the risk of sparking. On a machine with multiple test stations, the ability to selectively incorporate a nitrogen environment on some stations while not on others can provide an optimal mix of quality results and overall throughput.

Output Options: Flexibility at the output stage is also significant in enabling the KGD machine to mesh with the different requirements of downstream production processes. While most assembly-level die attach applications tend to be oriented for using KGD packed in tape-and-reel formats, there also are likely to be some requirements for other formats, such as waffle packs, trays (Figure 3) and even rebuilding into a wafer pattern. Depending on their size and the markets they are serving, suppliers of KGD devices may be able to dictate one prevailing output format or may have to respond to different individual customer requirements. For maximum return on investment, it is important to deploy KGD processing equipment that can output to any format.

It is also necessary to incorporate capabilities for reorienting, aligning and possibly flipping the die at the output stage. For instance, bumped die devices are usually picked from the wafer with the bumped side facing up but then are placed into the tape or tray with the bumped side facing down. Other packing options, such as the ability to flood the tape pocket with nitrogen prior to sealing, can also minimize the risk of post-testing oxidation and thereby greatly increase the shelf life of the KGD.

Of course, the output subsystems must be able to separate and package all of the rejected die into trays or reject-bins for subsequent quality assurance (QA) analysis to evaluate and improve upstream fabrication processes. In addition, to accommodate QA sampling of the KGD process, it is also important for the system to be programmable for outputting random samples of KGD into trays for off-line inspection and testing.

The Bottom Line

The requirement for KGD is becoming a key prerequisite for maintaining acceptable yield levels for modern assembly-level die-attach applications. The ability to offer options for KGD production-ready devices is rapidly becoming a competitive issue. As a result, many semiconductor manufacturers and contract fabrication providers are turning to flexible KGD processing and handling systems, which can effectively inspect, test and production-pack KGD die in a single, continuous highly integrated process.

DANIEL BRUNGGER, die handling applications project manager, can be contacted at Ismeca USA Inc., 2365 Oak Ridge Way, Vista, CA 92083; 760-305-6200; Fax: 760-305-6294; E-mail: [email protected].

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