Siliconix unveils chip-scale power MOSFET packaging technology

Santa Clara, California–Siliconix Inc., an 80.4%-owned subsidiary of Vishay Intertechnology Inc., has unveiled a proprietary chip-scale power MOSFET packaging technology that will greatly reduce the size of the devices required to manage and convert power in cell phones and handheld internet appliances.

The new Vishay Siliconix MICRO FOOT(TM) devices use a solder bump process along with proprietary techniques developed at Siliconix to eliminate the need for an outer package to encase the power MOSFET die.

With the package eliminated, and by enabling a device that can be mounted directly to the circuit board, MICRO FOOT power MOSFETs will allow designers to obtain the same performance as devices packaged in the TSOP-6, according to the company, in a footprint that is 70% smaller and with a 50% lower height profile.

New MICRO FOOT power MOSFETs will serve in low-power, low-duty-cycle applications such as cell phone power management and power conversion, where their small size and height will enable slimmer end products with a broader range of features.

For higher-current, higher-power-cycle applications, Siliconix is introducing PowerPAK(TM), a new packaging technology that the company reports provides the thermal performance of a DPAK package in an SO-8-sized footprint.

“Minimizing the board space required by power semiconductors is crucial to enabling new generations of cell phones and other portable information appliances that will make the wireless Internet an affordable reality,” says Dr. Felix Zandman, chairman and chief executive officer of Vishay. “With MICRO FOOT, we’re giving mobile communications designers a footprint and height profile that is an order of magnitude smaller than the TSOP-6 power MOSFETs they use now, and with no sacrifice in performance.”

Vishay Siliconix MICRO FOOT devices are sampling to selected customers now. Production quantities of the first MICRO FOOT devices will begin shipping in Q1 2001.


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