Tality Corp. offers IP and IC design services to develop PHY devices

San Jose, California–Tality Corp., a subsidiary of Cadence Design Systems, Inc., today announced what it believes to be the industry’s largest independent offering of intellectual property (IP) and IC design services for the development of Physical Layer (PHY) devices.

The company’s portfolio of PHYs consists of many of the standards prevalent in the communications industry today. These include 10B-T/100B-TX Ethernet, Gigabit Ethernet, USB 2.0, Infiniband, XAUI, Serial ATA, and HomePNA 2.0. Tality will continue to develop new PHYs for emerging standards as well.

“Tality has assembled a formidable library of PHYs and silicon-proven design methodologies into a build-to-suit program,” says Tim Henricks, vice president and general manager of Tality’s Analog/Mixed-Signal design group. “We have over 60 analog/mixed-signal engineers dedicated to assisting our clients worldwide in implementing advanced PHYs and reducing time-to-market. With our IP, associated methodologies and expertise, we have become seamless partners in their development process.”

Tality’s offering is customized for semiconductor, fabless semiconductor, and systems companies that require state-of-the-art PHYs and design services to create products.

In this area of IC development, Tality focuses its resources on standards-based data communications opportunities to design customized, highly integrated ICs. The company claims that its field-tested, proven IP reduces the development window for core product design.


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