Toshiba, Infineon to develop FeRAM

Tokyo, Japan–Toshiba Corp. and Munich, Germany-based Infineon Technologies AG have announced an agreement to develop nonvolatile memory technology and products based on the ferroelectric principle.

The ferroelectric random access memory (FeRAM) represents a new paradigm in memory technologies, according to the companies. Using ferroelectric materials, FeRAM combines the high-speed and endurance of widely used dynamic and static random access memories with the ability to store information in the absence of power.

Technology and product work under the agreement will focus on memory cell structure development, boosting the number of read and write cycles, raising access speeds, enhancing long term reliability, and establishing a method for resolving metal contamination of silicon during chip production. The first commercial product is a 32M FeRAM, for use in cellular phones.

The advantages of FeRAM compared to NOR flash memory devices include SRAM-like fast read and program response times, low power consumption, and an immense number of non-volatile read and write cycles. This makes the technology well-suited for use in applications as diverse as game consoles, cellular phones, mobile products, and IC cards. Toshiba and Infineon will introduce a 32M FeRAM as their first jointly developed product. It is expected to replace the current multichip package (MCP) module for cellular phones, which consists of an SRAM chip and a NOR flash memory in a stacked configuration.

Toshiba will bring to the collaboration its advantages in lead zirconate titanate (PZT) process technology, its patented “chained” cell structure, its 1 transistor 1 capacitor cell structure, and know-how gained in development of the 8M FeRAM. Infineon will contribute know-how in enhancing the number of read and write cycles, and in resolving metal contamination of silicon.

Working from the 8M FeRAM recently developed by Toshiba, the collaboration plans to produce and jointly market its first engineering samples in March 2001. Commercialization of a 32M device is expected at the end of 2002, and the collaboration will then be extended to 64M, or as far as 128M devices, depending on market conditions.

The joint development program will start in early January 2001 at Toshiba’s Advanced Microelectronics Center and Ofuna Office of Semiconductor System Engineering Center in Yokohama. Development costs will be shared by the partners.


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