Berkeley, California–Today’s chips, built from more than a dozen layers of material etched with electronic circuits, each need a photomask to project the circuit pattern–an expensive and time-consuming process. An effort to eliminate photomasks from the lithography process has led researchers at the U.S. Department of Energy’s Ernest Orlando Lawrence Berkeley National Laboratory (LBNL) to investigate ion beam technology and a dot-matrix lithography technique as a possible solution.
“Chip manufacturers hope to pack a hundred million transistors on a chip by 2005,” says Ka-Ngo Leung, of LBNL’s Accelerator and Fusion Research Division and a professor in the Nuclear Engineering Department at the University of California at Berkeley. “In 5 years or so, features as small as 100-nm will be common. We’re shooting for 50-nm.”
Depending on the atomic species, ion beams can be used to dope semiconductors while carving out circuit patterns. By using what Leung calls “dot-matrix on the nanoscale,” he and his colleagues intend to use ion beams to eliminate the need for conventional lithography masks altogether.
The researchers have built a Maskless Microbeam Reduction Lithography System (MMRL), in which an ion source operating at 20eV accelerates ions at precisely controlled energies through a universal pattern generator–an array of fine holes, each a micrometer in diameter, in a compound electrode 40 micrometers thick. Each hole forms an ion beamlet that can be switched on or off to create any desired pattern. Using this technology, a dozen different patterns can be programmed to quickly succeed one another–rather than using a dozen separate masks.
The pattern of beamlets that emerges from the MMRL’s pattern generator is focused down and reduced 10 times–compared to four times for other machines–before it reaches the target wafer. “Presently we reduce the pattern 10 times to achieve features of 100-nm,” Leung says. “Soon we’ll reduce it 20 times or more for 50-nm and smaller features.”
Leung and colleagues used a separate Focused Ion Beam (FIB) lithography system to precisely focus and scan ion beams using lenses comprised of multiple electrodes–demonstrating “direct-write” processes with beams of oxygen, boron, and phosphorus by inscribing patterns directly on movable substrates or selectively doping the substrates. By using several beams at once, the researchers hope to achieve much faster processing and higher throughput, making progress toward a practical industrial process.
By combining the multiple-beamlet array of the MMRL with individual FIB beamlets, Leung will work to produce the Maskless Nanobeam Lithographer, in which self-focusing beamlets can produce “dot-matrix” arrays and also be used with moving substrates, allowing patterns to be inscribed without distortion on both very large flat substrates and curved surfaces.
Other techniques to project mask patterns onto wafers–such as using electron beams and extreme ultraviolet light–are currently being developed by LBNL researchers.
By Sally Cole Cederquist, SST Web Editor