SEMI set to launch semiconductor educational campaign

February 26, 2001–Portland, Oregon–SEMI, the global industry association for semiconductor equipment and materials companies, will launch a Pacific Northwest educational campaign on Wednesday, March 7, to interest high school students in technology careers.

Twenty-five East Multnomah County, OR, high school juniors and seniors will be introduced to the semiconductor industry at SEMI’s 4-day Workforce Development Institute. This school-to-work program was created to educate students on career possibilities and generate a future supply of skilled technical workers for Pacific Northwest semiconductor companies.

“About one in every three of Oregon’s tech careers are at semiconductor companies,” says Galen Flinn, regional manager of Aera Corporation and chairman of the SEMI Pacific Northwest Steering Committee. “We need to prepare students for the modern workforce and chip-driven economy, and the program aims to achieve just that.”

The Institute concludes on Saturday, March 10, with a certification ceremony and awards presentation. Four outstanding students will be recognized with SEMI and LSI Logic scholarships based on the nominations of peers and final selection from the Institute’s awards committee.

LSI Logic Corp. will host the Institute’s pilot program at the company’s semiconductor manufacturing facility in Gresham, OR. Features of the Institute include side trips to the Microelectronics Training Center at Mt. Hood Community College and a tour of Fujitsu’s semiconductor facility.

“LSI Logic is pleased to be involved with this innovative program that addresses the need to stimulate more interest in the semiconductor industry,” says Norm Armour, vice president and general manager of LSI Logic Gresham Operations. “This is an extension of how LSI Logic partners with the community to enhance the learning experiences of students–the workforce of tomorrow.”

In addition to touring local semiconductor facilities, students will learn about transistors, diodes, clean-room protocol, and semiconductor patterning using etches and photolithography.


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