Intel delivers photomasks for extreme UV lithography

March 8, 2001–Santa Clara, California–Intel Corp. today announced that its researchers have developed and delivered the first industry-standard format photomasks for extreme ultraviolet (EUV) lithography. This marks a significant milestone in the demonstration of EUV as the next generation lithography standard for the semiconductor industry.

Creating high-quality masks has been one of the fundamental challenges in the demonstration of EUV lithography. EUV masks differ from standard masks in several respects. Standard masks used today in IC manufacturing are designed to transmit light. Deep ultraviolet (DUV) light passes through conventional masks like light through a photonegative. EUV light, on the other hand, is absorbed in the atmosphere and by most materials. Therefore, EUV masks must reflect rather than transmit light. To achieve this, a special low thermal expansion substrate is coated with multiple layers of ultra-thin silicon and molybdenum using a novel fabrication process developed by the EUV Limited Liability Corp. (EUV LLC)–a consortium of semiconductor companies that includes Intel, Motorola, AMD, Micron, and Infineon. This special substrate creates a highly reflective mirror, which is tuned to match the frequency of the EUV exposure light. Patterns are then created on these special “mask blanks.”

Intel researchers have demonstrated that these new masks can be created using an extension of their existing mask-making technology, and with the current industry standard format. In particular, the Intel researchers demonstrated a new low temperature mask process to prevent intermixing of the multilayer reflector. In addition, Intel used a proprietary patterning process to demonstrate line widths 30% smaller than the most advanced masks in manufacturing today. The EUV masks delivered to the EUV LLC will print a minimum feature size of 50nm. Previously, both Intel and Motorola, as part of the EUV LLC, demonstrated the ability to make a mask in a format not standard within the industry today.

“Intel and its EUV LLC partners view EUV as the emerging next-generation lithography standard for the industry,” says Dr. Chiang Yang, director of Intel Mask Operations. “These masks help to ensure the continued progress of the EUV program, and demonstrate a lithography capability that can extend four generations beyond Intel’s current 0.13-micron process generation.”

These masks will be used by the EUV LLC to demonstrate the EUV process on the recently completed engineering test stand (prototype EUV machine). The EUV LLC member companies are funding 100% of the development of EUV lithography technology at the EUV Virtual National Laboratory (VNL)–combining the efforts of three U.S. Department of Energy laboratories (Lawrence Berkeley National Laboratory, Lawrence Livermore National Laboratory and Sandia National Laboratories). The charter of the EUV LLC is to develop and demonstrate EUV technology as a commercially viable technology for the next generation of lithography.

Moore’s Law scaling will continue on silicon wafers through the end of the decade using EUV lithography. Intel expects that the first EUV beta tools will be available by 2003 and manufacturing tools by 2005, with EUV becoming the dominant high volume production technology before the end of the decade.


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