March 19, 2001 – At the 26th SPIE Microlithography Symposium, held in Santa Clara, CA in February, the BACUS working group held its traditional panel discussion of reticle-related issues on Monday evening. The topic was “Reticle Defects – Will They Break Moore’s Law?” The general consensus that even 50nm defects – which will be printable in 2005 – will not stop the industry. Greg Hughes of Dupont Photomasks summed up the industry?s position when he said, “We will be able to repair all the defects that we find and we can’t be blamed for defects we cannot find.”
The Lithography Technical Group?s panel on “157nm Lithography -What is needed to have it on time?” seemed less reassuring. Panelists could not agree when ?on time? was. Will Conley of Motorola stated: “It will be ready when it was ready,” and then listed many issues from MEEF to integration to outgassing, all yet to be resolved. Later speakers pointed out other challenges, such as shipping reticles without pellicles, calcium fluoride quality, and timing. Yan Borodofsky of Intel proclaimed that if 157nm at k1=0.4 isn?t solid in 2002, the first generation of 70nm chips will be tailored to the capabilities of advanced 193nm tools. If the technology isn?t production-worthy in 2004, Borodofsky claimed that it would miss the window of opportunity. Panelists from Nikon and Canon projected mass production of 157nm tools in 2005, too late according to Borodofsky?s time-table.
A special panel discussion on “When will EUV tools be needed and available,” produced even more disturbing conclusions. Paulo Gargini pointed out that the first opportunity to insert 193nm had been missed and that the key opportunity to insert EUV would come in 2003. However, Scott Hector of Motorola pointed out that the cost of having EUV ready for 70nm in 2005 would be around 20 times the funds spent on 248nm lithography in 2000, roughly $10 billion, by this reporter?s estimate. While there were technical challenges in the source and mask substrate, the panel did not expect any technical show stoppers. Hector, however, pointed out that a throughput of 80 wafers/hour would be needed to justify the projected tool cost, which falls on the familiar exponentially rising line. Such a throughput requires a 40-fold improvement beyond current technology.
Don Sweeney of Lawrence Livermore Laboratories reported that it currently takes a full year to make a mirror set for EUV. Industrial insertion would require manufacturing 300 such sets per year, a daunting challenge. However, the final word was perhaps Paulo Gargini?s who pointed out that 13nm would be only 50% of the exposure tool market even in 2012. That market would only be 1% of the $500B semiconductor industry, so the market for tools requiring $10B investment in the next 4 years would be $2.5B in 10 years. While the promoters of EUV technology may be correct that it is absolutely essential that the toolmakers buy in to the EUV program to ensure the prosperity of the semiconductor industry, it is equally clear that present business models cannot justify such commitments in the presence of other needs and uncertainties.
On balance, the 2001 SPIE Lithography Symposium was the most successful to date, with key results reported both at the leading edge and the practical production level. However, there are many challenges and changes ahead, perhaps more than any profession can deal with on a 2-year roadmap cycle. However, continuing the collaboration among the sub-fields of lithography evident at this conference should make accomplishments more timely.