Briefly Speaking

Semitool receives patent for copper seed layer enhancement

Semitool (Kalispell, Mont.) has received a patent for copper seed layer enhancement, an advancement in technology that will help semiconductor device manufacturers achieve high-performance devices and smaller chips from copper interconnect-based semiconductor devices. The seed layer enhancement technology can extend the application of copper to design rules beyond 0.1 micron.

Copper seed layers are deposited on silicon wafers during the manufacturing process by physical vapor deposition (PVD). The minimize seed layer discontinuity, PVD layers are typically deposited at a thickness on of 1,000 ÅÅ. However, a thick PVD layer can lead to overhang of the deposited material. The patented seed layer reduces this thickness to eliminate overhang.

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