By Paula Doe
WaferNews Contributing Editor
Japan’s latest government-funded industry research initiative for 50nm generation technology plans to start by designing and developing its own new semiconductor production tools.
Japanese press reports said Intel researchers would also participate, but Intel sources could not confirm this before press time.
The MIRAI (Millennium Research for Advanced Information Technology) project officially started August 1, and kicked off with a press conference where project leaders said they intended to become the world’s top semiconductor research organization within three years. Officials said the main difference between this project and others like Europe’s IMEC was that MIRAI doesn’t intend to use commercially available or beta production tools, but plans to design and develop its own experimental and alpha tools. One goal often mentioned in the planning of the program was to boost the competitiveness of Japan’s equipment sector.
The seven-year project starts with a budget of $30 million (3.8 billion yen) this year, and with about 100 researchers – 34 from the government’s Advanced Semiconductor Research Center (ASRC), 55 from the 24 participating makers of chips, equipment, and materials that belong to ASET (Association of Super-Advanced Electronics Technologies), and professors and graduate students from 13 university research labs. Until the government-funded clean room in Tsukuba is completed next spring, work will be done at existing government labs and at Toshiba’s research center in Kawasaki.
The project will be organized into five separate research projects: high-k gate stack technology, low-k modules, new transistor structures and metrology, lithography and masks, and circuit systems.