SEMICON West report

Life goes on at SEMICON West

SAN JOSE, CALIF. – There were certainly signs of the industry downturn at SEMICON West – modest social events, fewer nifty give-aways at the booths, less foreign traffic perhaps – but the atmosphere was generally upbeat. The turnout was better than many feared, with everyone apparently realizing that now is the time to learn what we need to learn before getting overwhelmed again with a need to get products out the door.

Equipment Trends

Inspection: Many of the interesting developments at the back-end portion of the show in San Jose were in the area of inspection. August Technology, for example, introduced a new system using what it calls a rapid confocal sensor to improve the resolution in a bump inspection system. A pin-hole aperture in the tool allows only light focused from one vertical plane to reach the sensor, facilitating very precise measurements of z-dimension features, such as bump heights. The imaging technique also overcomes some of the challenges faced by triangulation methods as the features shrink.

SolVision, a small company based in Quebec, displayed an inspection system that significantly increases the throughput of a Moiré interferometry approach, increasing the scope of applications for which interferometry can be used. FeinFocus discussed its new X-ray inspection system, claiming sub-micron defect detection capability with a proprietary X-ray tube and small focal spot size.

One intriguing question raised by the proliferation of these and other greatly improved inspection systems is whether these capabilities increase or decrease the emphasis on creating the best possible process. The inspection systems can be used for process characterization and development, but because these tools make it more feasible to identify faults in a manufacturing environment as well, there is less potential risk from an out-of-spec process.


Figure 1. Total annual semiconductor equipment billings (Source: SEMI).
Click here to enlarge image

Optoelectronics: Optoelectronics was, of course, the word buzzing around the most, with new systems and capabilities being announced by many companies. Universal had a new placement system for attachment of opto components, with many features being added to its standard platform for these applications. The capabilities include in-situ UV curing using a new UV LED technology, placement with respect to previously placed components, temperature control for eutectic die attach, and the ability to handle very small die. MRSI's new optical assembly work cell for eutectic die attach of lasers was also on hand, with a placement accuracy of 5 microns.

Test: The automatic test equipment (ATE) vendors were also very active at SEMICON West. Advantest was showing several new products, including a new system-on-chip (SoC) handler with a throughput up to 6,000 devices per hour.

LogicVision, a provider of embedded test structures, demonstrated its technology on SoC testers from Advantest and SZ Testsysteme. LogicVision's technology embeds test circuits compliant with the IEEE 1149.1 standard, which allows the IC to be tested with just four external control pins, with very little extra space required on the chip. This approach reduces the number of test pins needed per device, which allows, among other things, for the parallel testing of high pincount devices. (See “Amkor expands matrix processing and parallel testing” for related news on p. 12.)

Teradyne reported on a shift in IC test flows being driven by the tiny packages demanded in portable devices. The challenges of testing and handling CSPs and other small packages, as well as advances in tester capability, have allowed more test to occur upstream on whole wafers.

In an announcement that was more typical of the front-end portion of SEMICON, Teradyne also introduced “eSupport,” its e-diagnostics program that allows remote access to the equipment via a secure connection. This allows applications engineers or other support personnel to troubleshoot and service the tester remotely. When asked about e-diagnostics, Kulicke & Soffa did not see it coming on back-end assembly tools like wire bonders for three to five years.

Front to Back, and Other Strategies for Surviving the Downturn


Figure 2. Model to predict annual shipments by analyzing Q1 orders (Source: SEMI).
Click here to enlarge image

Just a few years ago, the demarcation between front-end and back-end processes was a relatively clear one. Now, perhaps the most promising industry trend is the drive to provide “total solutions” – to take customers all the way from wafer processing to final test and packaging. For that reason, there were a lot of introductions and handshakes at SEMICON West between individuals who were not new to the semiconductor industry, but new to the back end and new to each other.

One such company is Cimetrix Inc., a developer of software products for 300-mm semiconductor tools and motion intensive applications. In a strategic move, the company is aiming to fill the last gap in their portfolio by entering the back-end market.

“Semiconductor equipment manufacturers are transitioning to 300-mm wafer processing, which gives Cimetrix the opportunity to enter the communications market at a pivotal time,” said Dave Faulkner, office of the president.

Wafer maps: Another such company making the transition from front-end to back-end is Kinesys Software Inc. Kinesys, with more than 20 years of experience in the front end, has chosen to address “inkless assembly” in the back end. Inkless assembly uses computer-generated wafer maps instead of ink to classify good and bad die on a wafer. Most advanced packages cannot tolerate ink as a contaminant in the process, so this technology targets the specific needs of the back end.

“Improvements in circuit complexity and performance can often be attributed to the front-end process steps. However, with the proliferation of cell phone and other handheld portable devices, the emphasis is shifting toward the back-end process steps,” said Dave Huntley, president of Kinesys. “The end-user product is more affected by the quality and density of the packaging and interconnects than the performance of the individual devices.”

Covering all the bases: Kulicke & Soffa, as the world's largest supplier of semiconductor assembly equipment, also knows the importance of providing total solutions to its customers. Despite the fact that the industry downturn has caused wire bonding to take a painful hit, K&S is maintaining a healthy long-term business by targeting several sectors of the market. K&S has divisions dedicated to both wire bonding and flip chip technologies, so no matter how the tides turn, they're covered. Scott Kulicke, chief executive officer, reminds us, however, that more than 90 percent of ICs are wire bonded and that “None of us will live to see the demise of wire bonding.”

When asked to offer his advice about how to survive an industry downturn, Kulicke said this: “Keep fixed costs low; manage cash; keep cycle times short by reacting quickly; be willing to make hard decisions and treat your employees like grown-ups; recognize that technology keeps going even if business doesn't (you're still going to need next-generation products); maintain face-time with your customers even when they're not buying; take the time to be creative and try out new ideas; and, more than anything, don't lose hope.”

Market Analysis

Duck and dodge: When asked the question, “So, when do you think the industry will turn around,” most executives and marketing spinsters at SEMICON West offered well-rehearsed lines indicating that the industry would start an upward path by next year – admittedly not as soon as they had once hoped.

Discussions about the industry's economic woes weren't surprising, but what was interesting was the level of uncertainty that followed each conversation. It almost seemed like the topic was old-hat, something that people are just hoping now to wade through, survive and be ready for the next upturn.

Industry research: Dan Tracy, senior market analyst of industry research and statistics at SEMI, served up one morning a market briefing that primarily focused on the packaging industry. Noting that worldwide economic conditions are one factor for the current downturn, he noted that some companies believe the upturn will come in the fourth quarter while others are predicting the first quarter of 2002. Ask executives on the show floor, and most are looking toward 2002. The most pessimistic view heard was from the president of an equipment maker who saw all of 2002 being a down spell.

In reviewing book-to-bill trends, some attendees mentioned that they don't even look at them all that closely anymore. One factor that can contribute to this is an issue Tracy touched on in his discussion: Outsourcing has made the supply chain more complex, so it is much more difficult to have good “visibility” of the market's future. To no one's surprise, monthly trends of IC units sold show that 2001 will be the first buying slump since 1995. Even with the sharp decline, however, total annual semiconductor equipment billings for this year are still slated to make 2001 the second-best year in history (Figure 1).

Can orders from a year's first quarter really predict annual shipments? In a model prepared by SEMI, last year's model predicted 102 percent growth; actual growth came in at 87 percent. First quarter 2001 orders have dropped nearly 50 percent since the first quarter in 2000, while the overall model predicts 38 percent growth for annual shipments, to $29.6 billion (Figure 2).

A limiting factor: On the show floor, more than one engineer noted that new materials and new processes are needed in order for packaging technology to continue to advance and improve. Tracy noted that 60 to 70 percent of all BGA packaging failure is because of substrates. Substrate costs may also inhibit the ramp-up rate for flip chips, said Tracy, and wire bonded substrates are less expensive than flip chip substrates.

Killer apps: What's missing from the turnaround factor is a new driver – the killer app, if you will. According to Tracy, as semiconductor content is increasing in personal digital assistants (PDAs), such technology is “becoming more pervasive in our home and work lives and will sustain the industry.” But it's no wonder that the industry is focusing on other methods to go beyond just staying afloat. The possible convergence of opto and electronics, and delivering solutions for this arena, is coming up in discussions much more often. According to Tracy, in just a few months he reported that he knows a half dozen packaging engineers who have shifted from the packaging world to the optoelectronics world.

SEMICON West 2002

Next year, the back end is featured first at SEMICON West. The Final Manufacturing portion of the show will be held July 17-19. 2002. in San Jose, Calif., and the Wafer Processing event will follow in San Francisco, July 22-24, 2002. For more information, visit www.semi.org or call 408-943-6901. Specific requests can be made through [email protected].


SEMICON West Technical Sessions

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In the session “Reliability of CSPs and Advanced Packages,” Teck-Gyu Kang described a new CSP from Tessera. External solder balls on the package are connected to the die via a copper lead coated with 90Sn/10Pb and connected to a high-lead solder bump on the die. Leads are designed in a variety of shapes – “S,” “C,” and “U” – to accommodate different substrate layouts A low viscosity encapsulant is used to minimize movement of the leads during encapsulation.

George Leal (Motorola) reported on an investigation of missing solder balls in TBGA and PBGA packages. Missing balls were observed after burn-in testing, primarily in corner locations, with a clean intermetallic mode fracture. Results were much better after changing the boat design in the testing hardware from one that aligned to corner balls to a design that used the package edge for alignment. Reducing gold plating thickness on TBGA pads also helped improve ball shear strength.

Marie Cole discussed recent modifications to IBM's existing ceramic column grid array (CCGA) package structure. There has recently been demand for both smaller package sizes for more aggressive environments and larger package sizes to accommodate increasing I/O counts without reducing pitch. High-power applications require heat sinks, the weight of which is limited by the reliability of the solder columns. Thermal fatigue lifetimes for packages with heat sinks were greater than 5,000 cycles for 25 mm (small) packages and around 200 cycles, still adequate, for 52.5 mm (large) packages. The CCGA packages can be mounted either horizontally or vertically.

Several of the speakers at the “MEMS/MST Technology” session divided the MEMS market into two categories of applications: “Old ” (accelerometers, pressure sensors, thin film heads), and “New” (RF, optical, bio). The old applications are primarily electromechanical devices and are now commercially viable and are volume drivers in the marketplace. The new applications are still in development and provide opportunities for growth.

A key focus of the session, echoed by most speakers, was on the technical challenges that needed to be overcome to commercialize MEMS, and the wide range of process variables to be considered for a MEMS fab as compared to a CMOS fab. Wafers for MEMS are non-standard, with thickness ranging from 100 µm to 2 mm, odd shapes, various materials, and sometimes through-holes that make wafer handling a challenge. Wafers are sometimes coated on both sides, and resist thickness can be much larger than that seen in CMOS fabs, requiring deep reactive ion etching (DRIE). Equipment and processes often need to be customized for each product, making cost reduction difficult.

Discussion of back-end processing was limited, though Tony Flannery (Transparent Networks) mentioned process flow issues, such as whether testing should be done before or after packaging. Arthur Holzknecht (Etec) presented test requirements for optical MEMS, with emphasis on how to achieve production volumes. Most existing processes for MEMS testing are manual and may not transfer well to high volume, and high-volume IC testers do not include capabilities for testing that is specific to MEMS (for example, measuring motion of a MEMS device).

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