Bringing down the heat on gate oxides

By Debra Vogler

Technical Editor WaferNews

Applied Materials recently introduced its decoupled plasma nitridation (DPN) chamber that incorporates a high concentration of nitrogen at the surface of an ultra-thin gate oxide, providing protection against leakage current and boron penetration. The process is single wafer.

The DPN chamber is a derivative of AMAT’s decoupled plasma source etch chamber that has an installed base of over 700. Twenty DPN chambers have been shipped to date with about one-third in production at customer sites. Some are standalone chambers for use at 180nm and above. Other chambers are being used for R&D at the 130nm and 100nm nodes, mostly on cluster tools. The next phase of the product line, scheduled for release next year, is to expand on the current work and improve the company’s POLYgen (poly electrode) process to better manage the Poly-Si and SiON interface.

“As the industry moves to less than 15-angstrom thick gate dielectrics for 100nm, it becomes more difficult to prevent boron atoms from diffusing through gate oxide,” explains Paul Meissner, VP and GM of Applied Materials’ thermal systems and modules business group. “In addition, it is much easier for current to leak through these thin materials. Using the DPN process, we’ve found that the key to limiting boron diffusion and minimizing leakage current is to maintain the maximum amount of nitrogen at the poly-Si/SiON gate interface and a controlled amount of nitrogen at the interface between the substrate Si and SiON interface.”

A feature of the DPN process is that it occurs at a low temperature – room temperature. As the industry moves further down the roadmap, the total amount of heat seen by a wafer, as well as the maximum temperature it sees as it moves through various process steps – the thermal budget – will need to be kept as low as possible to prevent species movement.

Dean Freeman, principal analyst at Gartner Dataquest, thinks DPN might have advantages for materials or processes that have thermal budget issues. “A single-wafer process is generally better at controlling the thermal budget because you don’t have to ramp wafers up and down in temperature as in a batch tool,” states Freeman. Even though he believes Applied has hit a market need by going after the 0.13-micron insertion point, there could be some competition on the horizon. “Right now, there’s a COO/differentiation battle going on between single-wafer process and batch tools. But when transitioning to 300mm wafers, the industry could go with either single wafer process tools, or mini-batch tools.”


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