Jan. 18, 2002 – San Jose, CA – Toshiba America Electronic Components Inc. (TAEC) has unveiled a new 32-bit MIPS-based microprocessor (MPU) targeted at automotive information display applications such as instrument clusters, dashboard graphics, and navigation systems.
This move marks TAEC’s entry into the microprocessor segment of the US automotive market. Follow-on products are planned.
Designated the TMPR3916F, the new chip integrates a dedicated graphics display controller, controller area network (CAN) modules, and peripherals to enable compact, cost-optimized system solutions with superior graphics performance, said TAEC. Samples will be available in March 2002.
“Our targeted medium size thin film transistor liquid crystal display automotive applications require a highly integrated, cost-effective solution. Accordingly, we took a single chip approach and architected the TMPR3916F to minimize total system cost, including memory, and reduce development time,” said Tetsuro Wada, director, business development, of TAEC’s MPU business unit. “A single external DRAM in an x32 configuration supplies all necessary graphics buffer and main memory,” he continued.
The unified memory architecture provides the central processing unit with direct access to the display memory and realizes high performance graphics operations, including flexibility for drawing and rendering functions, TAEC said. The four-layer graphics concept provides transparency and smooth scrolling functions.
Along with a built-in SDRAM controller and serial communications interfaces, the integrated two channels of CAN support direct automotive networking, the company said.