Three of the world’s top 10 chipmakers – STMicroelectronics, Motorola, and Philips – have signed a memorandum of understanding to create a comprehensive alliance dedicated to breakthrough semiconductor technology development. Their joint investment will total $1.4 billion by 2005.
The move redefines the industry model for such advanced development, the companies claim, with the goal of creating future-generation technologies and SoC solutions more quickly and cost-effectively.
The alliance would include the participation for process development and alignment of the world’s largest semiconductor foundry, TSMC. The joint development program will be based in Crolles, France, in the new R&D Center called ‘Crolles2,’ and augmented by each company’s existing R&D operations and laboratories. In addition, to further support the alliance, CEA/LETI will increase its research efforts in the Grenoble, France, Labs.
Motorola joins Philips and ST in the 300mm wafer Crolles2 project, significantly enhancing the strength of the existing alliance. This expands the agreement announced last month by Philips, ST and TSMC to jointly develop CMOS process technology. The combined resources of the four companies will be dedicated to development of future generations of CMOS technology from the 90nm node down to 32nm over the next five years. Such reduced circuit geometry sizes will allow the partners to continue to meet customer demand for integrating more intelligence into smaller packages.
Motorola brings to the alliance its portfolio of leading-edge technologies, including SOI and embedded MRAM technologies as well as its know-how in advanced copper interconnect. This contribution builds upon the existing Philips and ST cooperation for core CMOS processes, which includes embedded DRAM, SRAM and analog CMOS.
The expanded commitment and access to 300mm pilot capacity at the Crolles site will allow for rapid introduction of the partners’ new products. Motorola, Philips and STMicroelectronics will be equal technology partners in the Crolles2 alliance in terms of capital expenditure, R&D costs and wafer load for the fab. TSMC will be a valued participant to achieve alignment of CMOS platform technology between the alliance and TSMC’s commercial foundry process.