The back-end process: Step 5 – Flip chip attach
Process and material options


Flip chip is a technology where semiconductor devices are mounted and electrically connected face-down directly onto substrates (Figure 1). Nearly 1.5 billion flip chips are produced annually, according to a report from Electronic Trend Publications. There are various applications from low-end customer products to high-end microprocessors with a very high number of I/Os (up to 2,000 pins). Flip chips can also be found in electronic watches, calculators, cellular phones, electronic organizers, cameras and many other products.

The driving forces for flip chip include:

  • Superior electrical performance with reduced inductance and capacitance of the connections and shortened signal paths. Flip chip devices usually allow much higher speeds than wire bonded devices.
  • Lower electromagnetic emissions, with no wire bond loops.
  • Flexibility in layout and the potential for a high number of connections per chip area. This can also lead to smaller packages or more functionality in the same size.
  • Better heat transfer characteristics, with a heat sink directly attached to the die.
  • High potential for cost reduction.

Flip Chip Processes
Flip chip technology is often equated with solder bumping, but there are many other flip chip processes, including the use of adhesives to make the mechanical and electrical connection. Adhesive processes include the use of anisotropic conductive adhesives, conductive adhesive polymers and non-conductive adhesive materials. The non-conductive adhesives are used primarily by major Japanese companies for flip chip on glass in liquid crystal display manufacturing. Adhesive flip chip technologies are suitable for very fine pitch, and they are lead-free and flux-less (thus representing a true no-clean process). The disadvantages are that there is no self-alignment, higher thermal and electrical resistance of the connections and more difficulties with rework.

Figure 1: Schematic drawing of a flip chip package.
Click here to enlarge image

Because solder-bumped flip chip technology has the longest production history and the highest production volumes today, the discussion of the process flow and other details in the following concentrate on this technology.

Flip chips can be placed on boards with other chips and components -which may or may not be flip chip – and this approach is called flip chip on board (FCOB). A flip chip application that is growing even more quickly is the use of flip chip technology inside component packaging, which is called flip chip in package (FCIP).

Flip Chip Process Flow
Figure 2 shows standard and alternative process flows for FCIP.

Bumping: Solder bumps can be deposited onto a wafer in many different ways, which are described in another article of this series.1 While the established companies in flip chip assembly might do their own wafer bumping process, solder bumping is now available as a commercial service from several subcontractors. Today's most significant challenges in wafer bumping are 300-mm wafers and lead-free solders.

Fluxing: Ensuring a reliable fluxing process step is essential in high-volume processing. The main function of the flux is to provide a tarnish-free surface and keep the surface in a clean state during the reflow process. The flux also influences the surface tension and, thus, the solder spreading. From the assembly point of view, the tackiness of the flux is important. This property of the flux helps to hold the chips in place while placement of further chips on the rest of the substrate continues, or as the substrate is moved to the reflow oven.

The most frequently used methods for flux application are dip fluxing and flux dispensing. In dip fluxing, a die is dipped into a very thin film of flux with the bumps down. The method requires pasty fluxes. In flux dispensing, the flux is applied using a dispensing tool that can cover the whole area under the die with a homogeneous thin film of flux. This method is only applicable with low viscosity fluxes.

Figure 2: Standard and alternative process flows for FCIP showing a) a standard process, b) flip chip assembly using a reflow encapsulant and c) replacement of underfill by a molding process.
Click here to enlarge image

Both methods have their advantages and disadvantages: While dip fluxing will concentrate flux in the places where it is really needed, this method will have more difficulties with solder bump height variations. Flux dispensing sometimes requires a subsequent cleaning step to remove excessive residues, but the method has more potential for high throughput assembly. Selecting a method depends on many factors: throughput, yield and reliability. Reliability is influenced not only by the flux type, but also by the combination of all materials (solder mask, alloy, underfill) involved, as well as the package layout and design. It is also important to consider equipment and process parameters. For example, systems using an integrated reflow oven will require less tackiness of the flux because the transport of the substrates can be done smooth and fully automatically.

Placement: Flip chip placement accuracy typically has tighter requirements compared to standard epoxy die attach of wire bonded devices, because the die with its bumps has to be aligned to the bond pads on the substrate. Most of the placement machines offered for flip chip applications are specified for ±9 to 12 µm at ±3σ. The real placement requirements actually needed in a specific application, however, are not easy to estimate.2 A combination of machine and substrate accuracy effects determines the placement yield to be expected in a specific process. Specifically, the placement yield is influenced by the dimensions and tolerances of the substrate layout and the trace or soldermask opening width. Furthermore, the soldermask position relative to the metallization layer is a very important factor. Even taking the effect of self-alignment into account, the design of the substrate and the quality of the substrate fabrication can have a great impact on the placement yield in a flip chip process on an organic substrate.

Reflow: In general, most flip chip assembly processes will require a nitrogen reflow atmosphere, even in the case of no-clean fluxes. The required oxygen levels for standard eutectic SnPb bumps are not especially low, as in the case of lead-free solder materials.

In FCIP processes, there is much more flexibility in optimizing the reflow profile with respect to flux characteristics and solder alloy compared to FCOB. This is because in FCOB, there are various devices with different heat capacities on the same board, but in FCIP, identical flip chips are soldered and it is also not necessary to consider temperature gradient restrictions because of other components. The result of a perfect soldering process is a complete wetting of the bond pad. The spread-out of the solder will lead to the so-called “controlled collapse,” and the standoff can be adjusted by the solder bump volume and the bond pad area.

Underfill: Underfills add mechanical strength to the package and provide protection from moisture. The most important function, however, is to compensate for the mismatch of thermal expansion between the substrate and chip. Absorbing the thermal stress by mechanically joining the materials together, the underfill process is essential to increase fatigue life of solder joints, especially in the case of flip chip on organic substrates. The classic underfill process uses capillary underfill materials. The encapsulant material is dispensed through a needle along one or two edges of the die. Because the material is pulled under the chip by capillary forces, it is a rather slow process and reasonable throughputs can only be achieved by running the process in parallel on multiple units.

Future Trends
Reflow Encapsulants: Reflow encapsulants – often also called flux encapsulants or no-flow underfills – offer the advantage of a simplified process flow. The concept is to place the flip chip directly into material that has already been dispensed, with the material being a combination of flux and underfill material. During the reflow process, curing and soldering have to be balanced in a way that the curing does not prevent self-alignment or even the collapse. After reflow, or at least after a subsequent curing step, the flip chip is readily encapsulated avoiding the costly capillary underfill process. Remaining critical issues are:
a) During the assembly process, bubbles and voids (especially at the soldermask openings) can be created, which reduces the reliability of the assembly. To avoid those, the material's wetting properties and flow characteristics have to be chosen carefully and moreover, the selection of a suitable dispense pattern is also important. Voids can often be correlated with the substrate itself and a suitable pre-dry procedure can be of help.
b) In spite of many development activities at different material suppliers, the reliability of packages assembled with reflow encapsulants is still a major issue. The reason is that the process does not allow the use of filler particles as typically applied in underfills to reduce the coefficient of thermal expansion (CTE). This often leads to a factor of two or three in the number of temperature cycles survived, compared with packages assembled using a standard process with flux and capillary type underfill.

The latter issue leads to the disadvantage that reflow encapsulants can be used for only small chips so far.

Flip Chip on Metal Leadframe: Flip chip interconnection for SO packages, built on metal leadframes, has recently been introduced by some of the major players in the industry.3 This type of package design is advantageous in terms of electrical and thermal performance. Because of the larger cross-section and better heat conductivity provided by the solder balls, the dissipation of heat is much better compared to wire bonded devices. On the other hand, the solder balls also allow higher frequencies and higher currents due to lower resistance.

The process flow is different from that described above, because standard leadframes are used and no self-alignment takes place because a soldermask is not used for cost reasons. Pitches and solder ball sizes are typically not as small as typical FCIP devices on organic substrates, which leads to less tight placement accuracy requirements. However, the fluxing or the preferred solder paste dot application process is very challenging for both the solder paste manufacturer and the equipment supplier.

Undermold/Overmold: Especially for FCIP, there is intense research activity on replacing the underfill process by a molding process. This could be, for example, a simultaneous under- and over-molding process that combines underfill and overmold in one process step. Besides the process problems to be solved with this new type of process step, material suppliers are working to find appropriate combinations to fulfill assembly and reliability requirements. This process offers a high potential for cost savings and could be one important factor for the breakthrough of FCIPs.

Does Flip Chip Replace Wire Bonding?
Until recently, wire bonding technology still met the requirements for the majority of applications in a cost-effective manner. The availability of high-speed automatic wire bonders and the existence of well established processes will prevent flip chip technology from totally replacing wire bonding – even after more than 30 years after the invention of flip chip. However, following the general trend of smaller, lighter, faster and more functionality, more and more applications will require flip chip and thus, the prospected growth rates are as high as up to 60 percent in the near future, according to Electronic Trend Publications. AP



  1. Deborah S. Patterson, “Solder Bumping Step-by-step,” Advanced Packaging, July 2001, p. 75.
  2. Peter Borgesen, “Flip chip on organic substrates,” SMTA Surface Mount International, September 1999, pp. 121-127.
  3. Beat Mueller, “Die Attach Step-by-Step,” Advanced Packaging, March 2001, p. 47.

Dr. Wolfgang Herbst, manager of basic research, can be contacted at Alphasem AG, Andhauserstrasse 64, CH-8572 Berg/TG, Switzerland, 41-71-637-63-63; Fax: 41-71-637-63-64, E-mail: [email protected].


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