Infineon grows carbon nanotubes on predetermined spots on wafers

June 6, 2002 – Munich, Germany – Scientists from Infineon Technologies have made an advance in the promising field of carbon nanotube (CNT) research. A tried-and-tested microelectronics process was modified so that CNTs could be grown at predefined locations on 6″ wafers.

The properties of CNTs can now be used in wafer-compatible processes for IC development. Numerous other features have made CNTs the top material for future semiconductor technology with significantly higher reliability and considerable increases in on-chip clock frequencies.

Carbon nanotubes belong to the Fullerene family and stand alongside graphite and diamond as the third form of carbon. A Fullerene is a cluster with a closed polyhedral structure (a type of nano-football) composed of an even number, mostly 60 or 70, carbon atoms. CNTs, on the other hand, are not round, but long and are tiny, defect-free tubes with extremely high length to diameter ratios. The tube diameter can be varied between 0.4 nm and 100nm whilst the length can reach 1 mm at present.

Since current can flow in CNTs practically without friction, “no surplus heat is generated which then has to be removed. Heat is only developed at the contact points to other materials when CNTs are used as connectors. Fortunately another property of CNTs helps in this case, namely their extremely high thermal conductance, which exceeds that of diamond (3000 W/(Km)).

Experts have calculated that the thermal conductance of CNTs should be twice as high. This is a tremendous value when one thinks of the tricks which the chip industry has to use at present so that high power processors do not, literally, burn through.

Successful modification of tested semiconductor production process

These few properties are enough on their own to make CNTs the top material for future semiconductor technology. Up to now the problem was that the manufacturing methods for producing CNTs, such as laser ablation and arc discharge, were difficult to combine with semiconductor technology.

Infineon has now changed that and made a giant leap forward in CNT technology. The Infineon team lead by Dr. Wolfgang Honlein, senior director in the field of nano-process research, was able to grow CNTs in a highly parallel batch process at predefined locations on 6″ wafers.

The Infineon researchers achieved this by successfully modifying a deposition process widely used in microelectronics. “Many process parameters, such as temperature and materials, are completely compatible with the standard processes used in semiconductor manufacturing,” explained Dr. Franz Kreupl, a Nano-Team researcher.

“The present results are completely reproducible and the structures grow at the predefined locations with sufficient homogeneity over the whole wafer,” said Dr. Sonke Mehrgardt, member of the board and CTO of Infineon Technologies AG. “The growth process lasts only a few minutes. These are optimum prerequisites for integration in semiconductor production line processes.”

The first possible application of the present technological innovation are in vias which are the contact bridges between two metal layers in ICs. Due to the high current densities and associated heating, conventional vias tend to distort and impair the operational ability of the chips.

Through the employment of CNT vias this should no longer be a problem, since they can handle considerably larger current densities and also possess a much higher mechanical stability. “With this discovery we can consider replacing all of the metal conductors in the chips with CNTs,” said Kreupl. This would ultimately lead to a considerable increase of the on-chip clock rate.

Three-dimensional scenarios

Replacement of the conductor lines with CNTs is only one possible application of these multi-faceted materials. A further important characteristic of the tubes is that it is possible to make them semiconducting and also to dope them. Thus, active switching elements, such as field-effect transistors, can also be made. The energy gap of semiconducting tubes can be controlled by defining the diameter.

The gap typically corresponds to 1 electron volt for a diameter of 1nm, which is comparable to the relationship for silicon-based transistors. Researchers at Infineon are also working on growing semiconducting CNTs on wafers using the same catalytic deposition method. “The whole topic has a promising future.

It is very possible that this technology could completely replace silicon-based semiconductor technology,” claims team leader Honlein. In this case, the relatively expensive silicon could be replaced by glass, for example. But that is not enough. The experts at Infineon are already playing with scenarios in which CNTs are used to extend the current planar microelectronics into a proper 3-D technology.


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