New system for testing chips after dicing and thinning

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SAN JOSE, CALIF. – Electroglas Inc. has developed test/handling equipment that allows for fully automated testing of ultra-thin chips, including the ability to test integrated circuits (ICs) after dicing or in wafer format. With the increasing challenges faced in wafer dicing and thinning for high-density packaging applications, this new capability increases the options for viable process flows involving ultra-thin chips.

Typically, it has been difficult to test bare die after dicing, and handling of ultra-thin wafers is a challenge throughout the industry. According to Electroglas, the new tool allows testing at more points in the process or without packaging the device, which reduces the chance of bad devices continuing in the process flow.

With packaging processes becoming more technologically advanced, it is more important than ever to prevent bad devices from going through unnecessary processes. Similarly, with the emergence of wafer-level packaging and the increase in bare chip assembly, defects introduced by wafer dicing and thinning can now be caught, even without a packaged part to test.


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