Ultrapure Water
Approval for plant expansion often comes with the stipulation that water demand from the regional supply remains unchanged
by Robert Donovan
While semiconductor manufacturing is a minor user of the world's total water supply, its impact on specific regions can be significant. For example, Intel Rio Rancho is the largest water user in the Bernalillo water district of New Mexico, even though its annual water draw is only about the same as 16 golf courses.
Semiconductor manufacturers in many locations are being denied requests for the additional water needed to support plans for expanding production or even to build a new fab at a site where it will become a dominant water user. The message to semiconductor manufacturers is to use less water per unit product output, notwithstanding the well-understood fact that semiconductor manufacturing already returns much higher product value per unit of water used than virtually any other human activity. Approval for plant expansion often comes with the stipulation that water demand from the regional supply remains the same as prior to expansion.
There are four general approaches to reducing water usage in semiconductor manufacturing:
- Replace wet processes with dry processes.
- Improve the efficiency of present processes used to produce ultrapure water (UPW) from municipal feed water or other sources of raw water.
- Optimize the tools and procedures for utilizing UPW in production processes.
- Reuse spent rinse waters and other wastewater streams from existing production processes.
Each of these approaches will be discussed separately in the following paragraphs, although manufacturers can and often do implement two or more of these simultaneously. These water-saving approaches are not generally independent in that implementing any one of them often affects the feasibility and impact of implementing others. In fact the optimal strategy/approach for reducing water usage at a given site depends on a large number of variables and often consists of using a combination of two or more of the approaches listed.
Replacing wet processes
Perhaps the most straightforward approach to reducing water usage in semiconductor manufacturing is to eliminate all production processes that now use water and replace them with dry (no water) processes. This strategy has been underway for more than 15 years, not so much with a water conservation goal in mind but rather improved process performance and control.
 Figure 1. Predicted reduced feed water requirements achieved by using HERO in Sandia's MESA facility. |
However, despite heralded trends and prognostications that all wet processes used in building silicon integrated circuits will eventually be replaced by dry, all-gas processes, semiconductor manufacturers still use large volumes of UPW during manufacturing. UPW continues as the primary fluid for cleaning and rinsing wafers. Its use is actually increasing in chemical-mechanical polishing (CMP) operations that continue to grow in popularity and already probably account for 50 percent of the UPW used in a contemporary fabrication facility (“fab”).
Most wet processes formerly used to etch patterns through a photoresist stencil on a wafer surface have already been supplanted by dry plasma etches. The anisotropic etching achievable with plasma etches proves decisive in the successful manufacturing of today's chip geometries in which the critical dimensions can be 0.18 µm or less. Wet etches, being isotropic, introduce dimensional variations in the pattern transfer process that become unacceptable in today's state-of-the-art chip designs.
However, resist removal and wafer cleanup following the etch process have not yet been adequately performed by dry processes and the need for wet processing to complete the photolithographic processing remains. Wet chemical processes, continue to be used for removal of resists and surface cleaning/conditioning of wafers for subsequent processing.
Particle removal in particular has been an Achilles heel for dry processing. The early SC-1 etch (5 H2O: 1 H2O2: 1 NH4OH) from the 1970s and its variations continue as the preferred particle removal solutions despite continuous developmental efforts based on dry methods such as laser irradiation and hybrid gas-liquid phase treatment. Particle adherence to a surface, attributable to van der Waals forces, is typically lower in liquids than in gases. At the same time, particle removal forces in liquid systems, whether based on mechanical drag or acceleration, chemical reactions or electrical repulsion, generally exceed those in gas phase media. Thus wet processes, using lots of water, continue to be an indispensable part of semiconductor manufacturing. Indeed, with the growing importance of CMP operations the goal of all-gas processing seems more distant than ever. The water needs of the industry are unlikely to vanish anytime soon despite the early optimism of the late 1980s.
Improving efficiency
UPW is water that has been purified to “intrinsic” quality; that is, water whose electrical resistivity depends only on the concentration of the hydroxyl (OH-) and hydronium (H3O+) ions in the water rather than any extrinsic impurities-just like the electrical resistivity of an “intrinsic” semiconductor depends only on the band gap of the semiconductor rather than impurity concentrations. The room temperature resistivity of intrinsic silicon is about 2 x 1010 ohm-cm; that of intrinsic water, 1.8 x 107 ohm-cm. In addition, UPW also implies sub-ppb concentrations of nonconducting impurities, although it is not necessarily sterile water. UPW at these concentrations is very reactive and purity can be maintained only by continuously recirculating the UPW through polishing modules. Intrinsic UPW is NOT what flows out of bathroom and kitchen faucets.
Semiconductor fabs employ extensive water purification technology to upgrade the quality of municipal feed water to that of UPW, making the unit cost of UPW about a factor 10-20 higher than that of municipal water. In the purification process, impurities are separated from the feed water by both reverse osmosis (R/O) membranes and by ion exchange columns. The impurities separated from the feed water create waste streams that reduce the volume of usable UPW below that of the feed water volume. For example, four gallons of municipal feed water may produce only 2.5-3 gallons of UPW, just a 60-75 percent recovery. Improving this recovery percentage to, say 90+ percent would significantly reduce the demand placed on a regional water supply by a semiconductor fab.
A high efficiency reverse osmosis (HERO) design does just that, according to its developers. [1] This system relies on extensive pretreatment to eliminate feed water hardness (effectively undetectable concentrations of calcium and magnesium) upstream of the R/O unit. This pretreatment allows the R/O to operate at higher pH (~10-11) than would otherwise be possible and thus achieve greater than 90 percent rejection of silica without fouling.
This approach matches the needs of facilities being fed exclusively by ground water. It was first introduced in the late 1990s at Intel Rio Rancho and is part of the expansion planned for Sandia's Micro Electronics and Systems Engineering (MESA) facility. Figure 1 shows the reduced water demand predicted to be realized by incorporating the HERO design into the MESA expansion plans. HERO, however, may not be suitable at every semiconductor site-it is not a panacea for UPW production everywhere.
Optimizing tool design, procedures
The focus of this approach is improved UPW utilization in the fab. Like drip irrigation in agriculture, a technique for getting more crop per drop, process optimization in semiconductor manufacturing seeks to get more chip per drip. It has two facets: 1.) the tool design itself – how efficiently does the tool use the water delivered to it? and 2.) the timing and sequencing of the steps making up a wet process specification – how optimal are these steps based on performance/water utilization? Past designs and practices for wet processing were developed during time periods when water conservation was not a recognized goal in wafer fabrication and when water use optimization was not a design/process requirement.
Tool design. Figure 2 illustrates calculated flow streams through a rinse tank typical of the early 1990s. Rinse water enters uniformly through orifices evenly spaced along the sidewalls at the bottom of the tank. The two-dimensional calculation of the flow streams shows that most of the water passes around the end of the wafer cassette rather than between the wafers loaded into the cassette.
Three-dimensional calculations confirmed this conclusion, as did experimental measurements in which flow streamlines were traced though a rinse tank made with transparent walls. This experimental arrangement facilitated modifications to the tank design and dimensions that corrected this deficiency. Flow streamlines were redirected through the cassette and between the wafers so that water entering the rinse tank flowed primarily through those regions where it would more efficiently perform the rinse function and convect released contaminants out of the overflow rinse tank. Contemporary rinse tanks generally employ these principles developed by Sandia-led analyses. [2]
Process optimization. Improved understanding of the rinse process has led to more efficient use of water for rinsing. Research initiated at Stanford University under SEMA TECH support led to the realization that contaminant removal during rinsing depended on a sequence of interactions, beginning with contaminant removal from the wafer surface. The next phase of removal was contaminant transport through the boundary layer adjacent to the wafer surface. Contaminant diffusion dominates this transport mechanism and it is not until a contaminant reaches the edge of the boundary layer that the streamlines of the rinse flow can efficiently transport the contaminant away. Thus, during the initial rinse period, contaminant transport from the wafer surface is essentially the same at zero water flow as it is at full water flow. Water flowing through the cassette during this initial stage is wasted water. Modifying rinse procedures to recognize this condition saves water without affecting the quality of the post-rinsed surface.
More detailed studies of rinse processes by R. Chiarello and coworkers. [3] has led to optimized procedures that achieve comparable rinse results in shorter times and with reduced water usage. For example, using sprays to rinse wafers minimizes water usage and total rinse times without sacrificing wafer cleanliness.
Reuse of spent rinse waters
By most metrics of measuring contaminants, the quality of spent rinse water discharged from many of the wet benches in a fab is far superior to that being fed into the front end of the UPW plant from a municipal supply. Thus it is reasonable to replace at least some of the municipal feed water with spent rinse water or, alternatively, to use spent rinse water as feed water to other water-demanding operations such as cooling towers, wet scrubbers or even agricultural needs, now drawing municipal water. “Recycle” is the SEMATECH approved term used to describe the reuse of spent rinse water as feed water back into the same UPW plant from which it came; “reclaim” covers reuse of spent rinse water in all applications other than return to the UPW plant. Both of these reuse options reduce the total water demand on a regional water supply and both result in improved performance of the operations they feed. For example, using spent rinse water as feed water to a UPW plant not only results in higher-quality UPW but also reduces the maintenance and operating costs of the UPW plant-fewer contaminants mean fewer regeneration cycles for both R/O and ion exchange columns. Reclaiming spent rinse water in a cooling tower or a wet scrubber means less scaling and fewer blow-down cycles.
Some U.S. semiconductor manufacturers do not yet accept recycling spent rinse water as a prudent action. While spent rinse water is, by most metrics, far superior to municipal water, it can contain some trace contaminants not found in any municipal water. Concern over the potentially disastrous impact of such contaminants on the UPW plant makes some manufacturers cautious about adopting such design strategy. Shutting down a fab for even just a few hours could cost more than the annual water savings in dollars. But dollars may not be the only or even the best measure.
 Figure 3. Water savings at Sandia realized by reclaiming spent rinse water in cooling towers. |
Improved UPW quality and stability are also major benefits of recycling spent rinse water. One manufacturer in the Bay Area reports that recycling actually saves his plant from shutting down while the UPW plant adjusts to changes caused by the Regional Water District switching, without warning, from ground water to surface water or vice versa. A facilities engineer from another manufacturer encountered severe opposition from the fab users when recycling was initially proposed. Now some five years later, these same fab users object strenuously when he wants to temporarily switch back to all municipal feed water in order to modify or do maintenance on the recycle loop.
Perhaps 40 percent of the U.S. semiconductor industry now recycles at least some spent rinse water. On the other hand, 80-90 percent of the industry reclaims some of their spent rinse water. Figure 3 summarizes the savings in water and money achieved by reclaiming spent rinse water from Sandia's fab. Fab personnel raise no objections to this approach because its adoption has no effect on the UPW plant or fab operations.
Reusing spent rinse water from CMP tools offers special opportunities because these rinse waters have higher concentrations of slurry particles than spent rinse water from other fab processes. Compensating for this apparent disadvantage is that the feed water requirements for CMP are not as stringent as for rinse waters fed to the UPW plant. Thus one possibility is to set up a separate water system dedicated to CMP operations in which spent CMP rinse water is treated for particle removal and then used as makeup water for subsequent CMP operations in an independent recycle loop.
The future
Water conservation in semiconductor manufacturing is already widely practiced in the U.S. and will continue to grow in scope. Overseas water conservation in semiconductor manufacturing is still ahead of the U.S., having more economic incentive (water costs more overseas) and regulatory requirements.
Recycling in particular would be aided by the availability of more on-line/in-line sensors that report water contaminant concentrations in real-time. This capability would provide needed assurance that objectionable trace impurities unexpectedly appearing in the spent rinse water would be rapidly detected and in time for appropriate diversion valves to protect the UPW plant from receiving any destructive contaminants. Present recycle systems require large holding tanks to store the rinse water until the slower analyzers now in use can confirm their suitability for recycling. Significant sensor development is underway at Sandia and other organizations. Devices labeled “Chem lab on a chip,” capable of detecting contaminants in near real time, are now a laboratory reality. Present sensitivities make such sensors more suitable for monitoring municipal water supplies than UPW. Detection capability in the sub-ppb concentration range typical of UPW is not yet available.
References
- Mukhopadhyay, D. and S. Whipple, “RO System that Reduces Membrane Scaling and Fouling Tendencies,” ULTRAPURE WATER 14 (8), October 1997, pp 21-22, 24-25, 27-30.
- Detrmination of rinse limiting factors for overflow rinse tanks, Anthony S. Geller, Sandia National Laboratories, Albuquerque, NM; Timothy J. O'Hern, Tom W. Grasser, Sandia National Laboratories, Engineering Sciences Center, Albuquerque, NM; Paul G. Lindquist, John O. Throngard, Santa Clara Plastics, Ultra Clean R&D, Boise, ID., presentation to the MRS, 1996, Boston, MA.
- Chiarello, R. and M. Tritapoe, “Water Conservation through the Use of Process Rinse Optimization in Semiconductor Manufacturing,” Semiconductor Fabtech – 8th Edition, pp. 239-243.
Acknowledgements
The author thanks A. Geller and D. Rogers of Sandia for providing the illustrations used in this article.
Robert P. Donovan is a CleanRooms columnist and a process engineer assigned to the Sandia National Laboratories as a contract employee by L & M Technologies Inc., Albuquerque, NM. He can be reached at [email protected].
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