Test wafers developed with JSR LKD-5109 are now available through International SEMATECH (ISMT) for etch, cleans, deposition and CMP studies. The wafers will be offered to semiconductor companies on a limited basis under a supplier agreement between ISMT, Austin, TX, and JSR, Sunnyvale, CA.

“We’re making these wafers available to give semiconductor companies an opportunity to develop their low-k related products and processes,” said Brent Ames, manager of wafer services for ISMT. “Low-k dielectrics is a critical challenge for our members as well as the industry at large.”

A lower ‘k-value’ dielectric improves chip speed and performance by allowing manufacturers to achieve smaller and higher density semiconductor devices with multi-layer interconnect structures. Spin-on dielectric materials are considered to be an enabling technology that will take the semiconductor industry to the next level in chip performance.

The test wafers are processed using JSR LKD-5109 and the ISMT 800AZ Dual Damascene Reticle set. JSR LKD-5109 will also be available through ISMT as blanket film wafers.