Next outsourcing step? Process integration companies woo fabless customers

By Drew Wilson
WaferNews Asian Correspondent

Traditional outsourcing has fabless companies designing chips then throwing the designs over the wall to foundries for manufacturing. That worked fairly well until design rules shrunk below 0.18-micron while 300mm wafers and new materials like copper emerged, multiplying the chances that something will go wrong at the foundry.

By smoothing out the process snags and promising high yields ASAP, San Jose, CA-based PDF Solutions Inc. hopes to carve out a new outsourcing space between fabless and foundry. PDF uses a combination of software and test vehicles to look at yield problems in the design stage rather than trying to fix yield problems after the IC is manufactured.

PDF pre-characterizes a process and bounces the chip design off the characterization of that process, explains Bob Johnson, analyst at Gartner Dataquest’s semiconductor research group. The company essentially simulates what can go wrong and uses that information to make the chip more manufacturable.

Better initial yields means faster time-to-market, which can often be the key factor in a fabless company’s success.

“The idea is to build it right, from the start,” says CEO John Kibarian.

Big IDMs such as Toshiba Corp., Sony Corp., and Texas Instruments have typically made up PDF’s customer base. But since March, PDF began a push for fabless customers by launching its design-based yield improvement product, which specifically targets the hundreds of fabless companies that play a high-risk game when sending their complex designs through a foundry process.

“Today when a fabless customer has completed a design and handed it over to foundry, they have no control over what happens,” says Garo Toomajanian, analyst at RBC Capital Markets. “[PDF] sort of puts them back in the driver’s seat and gives them some control over yield.”

PDF has already characterized major foundry processes at foundries TSMC and UMC, where many fabless companies get their chips made, Kibarian adds. According to management, one undisclosed fabless customer has already been signed.

PDF’s results-based revenue model may prove attractive to smaller fabless companies that struggle with heavy upfront costs. Called “gain share,” the model proposes a win-win strategy. It requires a small upfront fee with a percent of profits that the faster time-to-profitability brings in for the fabless customer.

Dataquest’s Johnson says PDF’s technology is similar to what other companies are doing in different process automation areas. “These companies are leveraging their expertise beyond just a software package to a full range of consulting services, enabling customers to implement what they’re doing and achieve gains quickly,” Johnson says. “It’s a logical extension of the outsourcing model.”

HPL Technologies Inc. is another company zeroing in on yield optimization, but through a software solution. In May, HPL formed a design for yield division aimed squarely at IC designers. The company is also partnering with EDA suppliers like Synopsys Inc., attempting to get yield analysis and prediction software into the IC physical design flow.

Meanwhile, PDF is working closely with equipment suppliers like Applied Materials Inc. to integrate PDF’s technical know-how and IP into Applied’s tools.

RBC’s Toomajanian adds that the emerging yield management and optimization space is part of the continuing disaggregation trend in the chip industry. “What used to be done by IDMs from design to completion is now being done by a number of different groups.”

WaferNews

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