SEMICON West: Technology Advances During a Slow Recovery

SAN JOSE, CALIF. In spite of continuing uncertainty in the semiconductor industry, there was a healthy level of excitement on the show floor at the back-end portion of SEMICON West in San Jose this year. Perhaps the camaraderie of surviving the worst stretch in history made the conference-goers just glad to see each other again after a brutal year. Additionally, there was plenty of new technology and products to keep people excited about the road ahead for the packaging industry.

Business Update
Gartner Dataquest kicked off the first day with its first SEMICON West meeting focused solely on the packaging, assembly and test industry. The basic message was that 2002 will end up being a difficult year again, but the slow upturn that currently is underway will lead to a healthy 2003.

Klaus-Dieter Rinnen, Gartner Data quest chief analyst, told the audience that packaging and assembly equipment revenue will fall by 9 percent in 2002 compared to 2001, although this actually is an improvement over the January projection of an 18 percent drop this year. Given the steep drop during 2001, a modest drop for the year as a whole still can be a good sign. Rinnen gave cause for significant optimism with a prediction of 54 percent growth in 2003. This makes back-end equipment a better sector than wafer fab equipment, with a 20 percent drop predicted for this year and 42 percent growth predicted for next year.

SEMI's mid-year consensus forecast was somewhat less optimistic, but it still predicted an overall gain of 29 percent for the chip equipment industry in 2003.

MRSI, a Newport Corp. Co. (North Billerica, Mass.) introduced its MRSI-175UF capillary underfill dispenser designed for flip chip applications.
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Jim Walker, Gartner's semiconductor packaging analyst, made the interesting comment that the packaging and test subcontractors might be squeezed from both directions. It is possible to envision the wafer fabs taking over wafer-level packaging processes, while contract manufacturers add system-in-package technology to their portfolios, leaving the traditional packaging companies out of the future growth areas. We will be watching for any trends reflecting this.

Wafer Bumping
Both the technical and business ends of wafer bumping were prominent at SEMICON West this year. Many wafer bump inspection technologies have emerged, and there remains the lingering question of who will do the wafer bumping.

The jury is still out on what type of company will be doing the bulk of the wafer bumping, whether it is wafer fabs, independent bumping houses or traditional packaging companies. The most common opinion expressed was that all three sectors will continue to be involved.

In a post-SEMICON follow-up meeting, Eelco Bergman, senior VP of business development at Amkor, told Advanced Packaging that it currently exercises all available approaches and is comfortable with that mix. On the other hand, Ralph Duceour, president and CEO at subcontractor AIT, saw enough external bumping capacity that AIT would not need to add that capability. A few others, including Tim Gillis, director of marketing at BTU International, said that the wafer fab will take over this function since the processes are most like those already found in wafer fabs.

Mühlbauer AG (Germany) showcased its DS 6000 high-speed die sorter.
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On the inspection side, August Technology had new versions of its bump inspection equipment to cover high-volume and low-end applications. RVSI was showing many new pieces of equipment, including a bump inspection tool with a new sensor for gold or solder bumps.

Michael Gray, VP of sales and marketing at RVSI, also told Advanced Packaging about the emerging market of substrate inspection for high-density packaging applications. Camtek, a relative newcomer in the packaging inspection equipment field, also had a substrate inspection capability to demonstrate at SEMICON. With the high value of substrates these days, inspection systems for them are a popular product.

Upgraded Equipment Capabilities
The increasing sophistication of packaging equipment was quite noticeable at SEMICON West. Much of the advanced technology was found in traditional packaging equipment, rather than the latest wafer-level tools. Some highlights include:

  • Alphasem's laminating station that increases throughput on its die bonder by applying material to parts in parallel
  • Asymtek's adhesive jetting capability that allows more complex dispensing patterns since the discontinuous jetting avoids adhesive build-up where lines cross
  • Camtek's inspection tool, which in-cludes a “learning” feature that increases throughput as it inspects more parts
  • Datacon's die bonding tool with a flip chip option, which also handles thin die, including fragile GaAs chips
  • ESEC's new rotary wire bond head that allows faster motion and increased throughput in its next-generation wire bonder
  • ESC's new large die flip chip bonder, designed in a partnership with MTBSolutions, which includes gaseous fluxing capability and an ultrasonic tacking process to attach a part while in fine alignment before the final metallurgical bond is created
  • F&K Delvotec's process control capability that adjusts the bonding process in real time by measuring the bond deformation during the bonding process
  • GSI Lumonics' post-mark inspection capability on its 300 mm WLCSP marking tool, which can adjust the laser power automatically depending on the process outcome
  • Kulicke & Soffa's demonstration of 25 µm pitch wire bonding
  • RVSI's handling system that was designed to use gravity to avoid jamming.

Equipment typically found in the wafer-fab is migrating into the packaging world, although many companies now are developing such tools specifically for packaging, rather than just forcing the front-end tool to perform back-end functions.

Adept Technology, for example, showed a wafer handler designed specifically for back-end processing. Because of the lower cost of back-end capital equipment, according to Adept, we might see back-end tools clustering around the automation to make the whole approach more cost-effective.

A new equipment company, NEXX Systems, currently provides a deposition system for wafer bumping and backside metallization. According to Richard Post, CEO of NEXX, the company intends to cover all the flip chip processes between lithography and inspection. Post told Advanced Packaging that NEXX has developed tools specifically for packaging because the business models are different. The cost has to be lower, and the tools have to last for more process generations. Also, they have to handle thin wafers, which front-end tools typically do not.

New Packaging Processes
Some of the most interesting capabilities on display at SEMICON were new processes for packaging applications.

DEK had a new overmold printing process – “StenSEAL” – for BGAs that was shown at the Kulicke & Soffa booth. K&S developed the printable mold compound for the package. To protect the wire bonds during the printing process, a UV-cured material is dispensed just on the wire bonds and cured quickly before the molding. According to DEK, the process results in void-free overmolding, which eliminates the need to pump out voids. The voiding problem has plagued a competing approach.

A leading candidate for the most impressive package demonstration was Fujitsu, who described a stacked package approach that included 25 µm thin chips. The chips are thin enough that they can be connected electrically with interconnect and dielectric layers deposited and patterned around them. This is another step in the path that integrates packaging and the wafer fab because the electrical connections typically formed by wire bonds in stacked-chip packages now are created with wafer fab processes.

Tessera had a new stacked CSP technology, which addresses the issue of testing chips that are being stacked. Because they are packaged, the cumulative yield loss of a stacked configuration is much less of an issue since the CSPs can be tested.

Finally, perhaps the most thought provoking process was presented by Ziptronix, a spin-out of the Research Triangle Institute in North Carolina. Ziptronix has a proprietary wafer bonding technology that accomplishes covalent, wafer-scale bonding at room temperature without adhesives. This works with a wide range of materials, and Ziptronix CEO Doug Milner told Advanced Packaging that it can be accomplished with standard industry equipment and materials.

The Ziptronix process has many intriguing applications. For example, one wafer could have holes etched through it, and when bonded to a base wafer, it would create wafer-level cavity packaging. Another potential option is the stacking of wafers with vias for through-wafer interconnects. The “invisible” nature of the bond provides many advantages over standard wafer bonding processes in this application. This gets the Advanced Packaging vote as a key technology to watch.


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