May 27, 2003 – Munich, Germany and San Jose, CA – Infineon Technologies’ Munich Research Labs have demonstrated, by shrinking present film thicknesses into nanotechnology geometries, that the stringent requirements of thin encapsulation films in metallization schemes of future chip generations will be met. The results show that thin barrier films, key components for advanced copper chip wiring, will meet the electrical and functional demands of the International Roadmap for Semiconductors (ITRS), which extends to 2016.
The ITRS expects a reduction of the barrier thickness from 12nm (100nm node, 2003) to 2.5nm (22nm node, 2016). The goal of the Infineon researchers was to investigate the scaling limits of the current Ta/TaN barrier technology and its compatibility with the end-of-roadmap target values.
The Infineon researchers have successfully performed an electrical assessment of the integration of ultrathin metallic barrier films encapsulating copper metal lines in advanced chip metallization systems. These electrically conducting films separate the copper metal lines from the surrounding dielectrics used for electrical isolation. Hermetic encapsulation of copper lines has to prevent copper diffusion into the dielectric isolation, and in particular from reaching the transistors below the wiring layers in the chip, as at transistor level, copper is readily destroying device operation.
To achieve best chip performance, these barrier films have to be processed as thin as possible for two reasons. Ultrathin barrier films around copper wires leave a maximum of space for the highly conducting copper wire. Furthermore, in the vertical interconnects between the layers of copper wires (via holes), the current flow crosses the barrier film. An ultrathin film provides a very low electrical resistance.
The results demonstrated barrier functionality against copper diffusion with film thicknesses of less than 2nm, meeting the same stringent reliability requirements as 50nm-thick barrier films in a current semiconductor product. The electrical resistance of via holes with such thin barrier films is sufficiently low to realize such structures in high-speed microprocessor chips expected to come to production by the middle of the next decade.