June 2, 2003 – Anaheim, CA – The X Initiative, a semiconductor supply-chain consortium, has announced that Applied Materials Inc. has produced the industry’s first 90nm test chip for X Architecture interconnect designs at its Maydan Technology Center in Sunnyvale, CA.
The fabricated test chip validates design rules and the manufacturability of X Architecture interconnect designs for copper/low-k chips using existing maskmaking and wafer-processing technologies.
The X Architecture represents a new way of orienting a chip’s maze of microscopic wires using diagonal pathways, as well as the traditional right angle, or “Manhattan,” configuration. By enabling designs with significantly less wire and fewer vias, or connectors between wiring layers, the X Architecture can provide significant improvement in chip performance, power consumption, and cost.
Applied Materials collaborated with other members of the X Initiative to fabricate the test chip. Cadence Design Systems provided the test structure design and chip validation tools for the project. Canon’s KrF FPA-5000ES3 stepper was employed for the wafer lithography.
Applied Materials used its interconnect fabrication technologies to produce the multilayer copper/low-k interconnect on 300mm wafers. The results were confirmed by using Applied Materials’ wafer inspection and metrology systems to validate critical dimension and defect levels.