August 13. 2003 – NASA scientists have developed a technique to use carbon nanotubes in place of copper conductors as interconnects on ICs, according to a report by the Gale Group.
The carbon nanotubes have advantages over copper in that they can carry immense currents (greater than 1 million amps/cm2) with little or no deterioration; comparatively, copper’s resistivity is inversely proportional to its size. Copper conductors must also be buried in deep trenches carved into the silicon wafer, a requirement that “is becoming a problem as components are made smaller and smaller,” said Jun Li, the team’s lead scientist at NASA’s Ames Research Center (ARC).
The carbon nanotubes are grown on the surface of a silicon wafer, then covered with a layer of silica to fill spaces between them. Additional layers can be built with vertical carbon nanotube wires that can interconnect other layers of the chip. “We think this new process may well help to sustain Moore’s Law growth curve,” said Meyya Meyyappan, director of the ARC’s Center for Nanotechnology.
While some issues need to be addressed to make the process work in areas such as lithography, Meyyappan thinks the nanotube technology could be ready for use in the next generation of chips.