300-mm designs boost fab construction, but cleanroom requirements relaxed

By Mark A. DeSorbo

TAIWAN—Despite hard times in the chip and microelectronics industries, a report from a firm that tracks wafer manufacturing says there are more than twice as many fabs under construction this year than in all of 2002.

At the time of this report, AU Optronics Corp., a maker of thin-film-transistors and liquid crystal displays, announced that it is spending more than $2.6 billion for the first phase of its next-generation fab at Taichung Science Park, with initial production slated for the second quarter of 2005.

The value of new fab projects, which for AU Optronics will yield 30-inch and larger panels, will be more than $21 billion when fully ramped—twice as much as last year's level, according to the study by Strategic Marketing Associates (Santa Cruz, Calif.).

George Burns, president of the research company, says 17 new fabs will start or restart construction in 2003 alone. As many as 12 of the facilities, he says, will be 300-millimeter fabs.

From cleanroom and contamination control standpoints, that sounds like good news. But with 300-mm fabs comes automation in the form of minienvironments called FOUPs—front opening unified pods—and that means less people in a cleanroom that does not have to be as clean as before.

“Cleaning requirements will continue to remain strong,” assures Burns. “But there will be some slight relaxation in the cleanroom class requirement. The need for a strict [ISO Class 3] in the ballroom is not as strong as it once was. So, now [chipmakers] are opting for [ISO Class 4] cleanrooms.”

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The need for garments, he adds, may also decline because of increased automation with FOUPs, which means fewer people in a 300-mm environment. “It will be a more relaxed environment and not as densely populated,” Burns says.

The report also says that future foundry capacity will be a mix of 300-mm and smaller wafers, with more than half being geared toward the latest technology. “The DRAM companies will all start construction on 300-mm fabs,” says Burns. “Powerchip in Taiwan will build a new fab, so will Micron, and IBM will start construction in New York. Samsung, Texas Instruments, TSMC, Chartered—just about all of your DRAM companies will build at least one more fab between now and 2004.”

“We're ready to ramp up,” Genda Hu, vice president of corporate marketing for Taiwan Semiconductor Manufacturing Co. Ltd., told the Silicon Valley/San Jose Business Journal. “If the market turns, we'll be ready.”

Burns sees growth in new fab activity and capital spending, but it will be restrained. The report's ongoing capital spending survey indicates chip makers will increase spending by 11 percent this year to $31 billion, up from $28 billion last year.

Along with the report from Strategic Marketing Associates, additional data confirms the continuing growth of Asia Pacific. For the first time, Asia Pacific will outspend all other regions of the world. (See “Forecasts call for modest growth in chip sales,” CleanRooms, July 2003, p. 1).

“Asia Pacific is going to be the champ, not only in terms of spending, but also where the fabs are being built,” Burns says.

Spending by U.S. companies will be down for the third year in a row—56 percent from its peak of $21 billion in 2000, according to the report.

“Outsourcing has a lot to do with it,” says Burns. “Some of the most famous names in the business—Motorola, Hitachi—are cutting back a lot in terms of production. They are outsourcing more than 50 percent of their capacity to Asia Pacific.”

That, Burns explains, has resulted in the reduction of jobs and cleanroom square footage in the United States. “It's a large-scale trend, and they are doing it because the industry is so volatile. It's not worth it for them to build a fab here and then have it sit empty,” Burns adds. “It's not the cost of the contamination control technology or maintenance. They are outsourcing their financial risk.”


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