Chartered takes wraps off 90nm

September 18, 2003 – Singapore’s Chartered Semiconductor Manufacturing has taken the wraps off its “NanoAccess” 90nm SoC process technology, based on its development work with IBM.

Now available are a design manual and SPICE simulation models for the technologies, which feature up to 9 Cu layers with full low-k and FTEOS, and an optional triple gate oxide capability.

Initial process qualification for FTEOS and low-k dieletrics is scheduled for 1Q04; multi-project wafer runs are slated for October of this year, using masks from Dai Nippon Printing Co. Ltd., with Toppan Printing Co. Ltd. currently being qualified.

Chartered has also formed a NanoAccess alliance, led by 15 companies offering IP, design, and manufacturing services for the 90nm technology.


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