Amkor, CASIO team up to assemble/test wafer-level packages

Wafer-level packages are created by building the package interconnects directly on the surface of the wafer. CASIO’s WLP technology improves electrical performance with copper routing and post. This structure, along with the screen printing encapsulation process, provides a high level of reliability and can be used with up to 300-mm (12-inch) wafers. Wafer-level packages are used with logic, memory and RF devices primarily in consumer electronic products, including cell phone handsets and other wireless applications, digital cameras and other handheld devices.

(March 24, 2004) Herndon, Va.&#8212The National Electronics Manufacturing Initiative (NEMI), an industry-led consortium focused on strengthening the global electronics supply chain, and the IEEE Components, Packaging and Manufacturing Technology Society (CPMT) have entered into a formal agreement that outlines key areas of collaboration between the two organizations.


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