Applied, Soitec ink GeOI deal

March 11, 2004 – Applied Materials, Santa Clara, CA, and French substrate provider Soitec have signed a deal to jointly develop germanium-on-insulator (GeOI) and other Ge-based processes for the 45nm node and beyond. The deal will combine Soitec’s Smart Cut technology with Applied’s Centura RP Epi system.

Germanium-based materials offer faster electron flow speeds, which can translate into 3x-4x faster transistor switching speeds compared with silicon, enabling “major technical advances in transistor performance over the next three to four chip generations,” according to Soitec COO Pascal Mauberger.


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.