In the News

AIT Pushes Forward Under Guidance of New CEO

SINGAPORE — Bruno Guilmart joined Advanced Interconnect Technologies (AIT) last September, and since then this Tier-II supplier of SATS services has set ambitious goals. The company's objectives at present are threefold: to be one of the top 10 SATS providers by 2006; to grow at twice the rate of the semiconductor industry overall; and finally, to have zero defects in anything AIT produces.

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Headquarters have been moved to Singapore with most operations in nearby Batam, Indonesia, and some remaining in Sunnyvale, Calif. In Sunnyvale, AIT operates a 20,000-square-foot package test facility for wafer probe, final test and other back-end test services. In Batam, the larger 370,000- square-foot assembly and test facility provides wafer probe, wafer backgrinding, package assembly, final test and drop shipment.

Why Batam? Batam has been a great success story for AIT. After five months, AIT has achieved high production rates. The labor pool is talented and highly cost competitive. Singapore institutions and government have provided more than 50 percent of funding for technology parks (six major technology parks, 16 parks total presently) in the area. Fresh water and food staples travel via air from Batam to Singapore, while business transfers from Singapore to duty-free Batam.

“Turnover in Batam is less than that experienced in China and Taiwan,” says Guilmart. “But we have turnover, because there is competition for employees. Training is still required. We also have bottlenecks, such as in wire bonding. And we can produce faster than we can test. Now, more customers than ever want test included in the assembly process. It's probably easier, and definitely cheaper, for us to purchase test equipment and use it for many lines. Our best success has been in high volume without defects. This is a dynamic industry, with more involvement in back-end assembly by the SATS provider than ever before.”

IPAC, Twin Advance Alliance Spins Off New Company

SAN JOSE, CALIF. — A joint venture between California-based Integrated Packaging Assembly Corp. (IPAC) and Twin Advance of Penang, Malaysia is launching a new company called IPAC Twin Advance that will offer advanced module and system-in-package (SiP) development and manufacturing services.

IPAC Twin Advance will be headquartered in Silicon Valley in the same building as IPAC, and is expected to share

the technology and manufacturing resources of IPAC in San Jose and Twin Advance in Penang.

Offerings from both companies will be available in the U.S. and Asia. In addition to bringing IC packaging to Malaysia and system-level manufacturing to Silicon Valley, advanced manufacturing lines are planned for each location. The new company's Japanese subsidiary, IPAC Twin Advance Japan, will develop business in Japan.

IPAC Twin Advance's primary focus will be on SiP applications, which use stacked chip-scale packages, flip chip and wafer-level packaging combined with SMT component placement as core technologies.

SEMI Forum Reveals Packaging Trends

SAN JOSE, CALIF. — During SEMI's 'Test and Packaging: 2004 and Beyond' lunch forum, held in February, several interesting trends were noted: unit shipments of IC packages and materials have reached historically high levels; wire bond pitches are nearing their theoretical limit; and alternative business models may be required to cope with the high cost of IC test.

Speakers included Jack Belani, vice president of business units and marketing for Kulicke & Soffa Industries; Eelco Bergman, senior vice president of marketing for Amkor Technology; Ron Leckie, CEO of Infrastructure; and Wilhelm Radermacher, director of product development for consumer and wireless semiconductor test for Agilent Technologies.

Leckie, who moderated the panel, presented a chart showing the dramatic cyclical growth in assembly and test equipment revenues. Calling it a “wild ride,” Leckie said “There's nothing like that at Great America,” referring the Silicon Valley fun park that boasts several rollercoasters. He noted that the capital ratio for the assembly sector, defined as the percent of revenues that device makers spend on assembly equipment, has historically been from 1 to 2 percent. For test, it's been 3 to 5 percent. If the ratio for assembly gear reaches the upper level of the historical average, equipment growth this year will be 87 percent, according to Leckie. In 2003 the sector grew 30 percent, with a capital ratio of 1.2 percent. For test equipment, if the ratio reaches 4 percent this year, the overall market will also grow 87 percent. “I don't know if it will be 30 or 87 percent, but it will be a nice big number,” Leckie said.

Belani, of K&S, noted that the IC assembly business is driven by units, not revenues. He showed K&S numbers for ball bonder utilization rates, capillary shipments and gold wire shipments — in all cases, the January 2004 data reached the historic highs of the year 2000. On the question of when wire bonding will “run out of steam” with regard to pitch, Belani said he had no idea. He noted that 15 years ago the industry expected 150-{mum-pitch to be the limit. Now, IC assembly houses such as Amkor are producing volume devices with 50- to 55-µm-pitch, and 25-µm-pitch devices are now in the research phase. In any case, the view was that the shrinking of wire bond pitch would start to slow down after about 25 µm. Belani also pointed out that during previous downturns assembly companies started looking into replacing gold bond wires with less expensive copper. Then, the upturn came and the issue went away. However, Belani said this time looks different. “We are seeing a tremendous interest in copper,” he said.

Bergman, of Amkor, provided a customer perspective. As a purchaser of assembly and test equipment, he said that Amkor is more concerned with ongoing repair and maintenance costs than the initial acquisition cost. That's because the life of the equipment was generally many years and it could be depreciated over this period. For test equipment, Bergman said his customers, namely the IDMs outsourcing their IC testing needs, were not willing to pay high prices for testing. Yet, test machines cost over $2 million each. The challenge is to find alternative business models such as pay per use or revenue sharing with the customers to get the required return on investment. Amkor believes the outsourced assembly and test market will grow from $26 billion last year to $34 billion in 2004 — representing about 16 percent of total semiconductor market revenues.

Toshiba Fab Gears Up for SoC LSI Production

TOKYO, JAPAN — Toshiba Corp. recently completed construction of a 300-mm fab at its Oita Operations in Kyushu, Japan. Toshiba plans to begin mass production of high-performance system-on-chip (SoC) LSIs this fall, with an expected initial capacity of 12,500 wafers per month.

In addition to 300-mm wafers, the new fab is expected to deploy 65-nm process and design technologies. A little further down the road, Toshiba says it expects the fab to lead the industry in introducing 45-nm process technology and applying it to SoC devices. Advanced SoCs slated for manufacture in the fab at Oita Operations include wide-ranging system LSIs for digital consumer electronics, mobile products and broadband network.

The Oita fab is the first of two 300-mm wafer facilities Toshiba plans to build. The second, to be constructed at Yokkaichi Operations in Mie, Japan, supports the company's goals in meeting fast-growing demand for NAND flash memory.

K&S Sells Flip Chip Business

WILLOW GROVE, PA. — Kulicke & Soffa Industries Inc. (K&S) sold its flip chip business to FlipChip International LLC for approximately $3.4 million. The company cited slow growth of the flip chip industry as a major factor in their decision, as well as achieving finer pitch through wire-bonding technology at a significantly lower cost.

“The flip chip bumping services performed by this business unit were no longer a strategic fit with the company's mission and goals,” says Maurice Carson, vice president and chief financial officer of K&S. “However, we did take care to find a buyer that would continue operating this business with most of the existing employees in order to provide a smooth transition for our current customers. This business represented 4 percent of the company's revenue for the first fiscal quarter ended December 31, 2003. The sale will be cash flow positive for the company. Going forward, we anticipate the sale of this business will have little impact on company financials.”

The sale included fixed assets, inventories and intellectual property of the K&S flip chip business located in Phoenix, Ariz. FlipChip International LLC, the new company, is located in Phoenix, Ariz.

IDC Forecast Calls for PC Semiconductor Sales Growth

MOUNTAIN VIEW, CALIF. — Economic recovery and rising PC demand boosted the PC semiconductor market in the second half of 2003, according to a study from market researchers at IDC. Revenue growth was largely limited to rising semiconductor unit sales, rather than rising prices, and to sales of systems to consumers (as opposed to corporations).

The study, 'Worldwide Desktop and Mobile PC Semiconductor Forecast 2003-2008', says that the inflection point in the recovery of the PC semiconductor market during 2004 depends on the factors that were missing at the end of 2003. Beyond economic growth and the seasonal uplift, a continuing recovery will require sales to both consumers and corporations. IDC predicts that overall (desktop plus mobile) PC semiconductor revenue will grow 18.0 percent to $53.6 billion in 2004, the highest annual growth rate during the study's forecast period. From 2003 to 2008, IDC forecasts that the PC semiconductor market will grow at a compound annual growth rate (CAGR) of 7.8 percent, rising from $45.4 billion to $66.1 billion.

“The recovery of the PC semiconductor market will hit its stride in 2004, specifically in the second half of the year,” says Shane Rau, IDC's lead PC semiconductor analyst. “Carrying the recovery along will be the key trends of mobility, connectivity and increasing overlap between the consumer and PC markets.”

Wafers Growing, But Will Profits?

PHOENIX, ARIZ. — A recent study from Semico Research, 'Wafer Demand 2004-2008: Wafers Growing But Will Profits?,' addresses the key questions of will there be enough capacity to fulfill the growth in demand next year, and can we make enough profit during this upswing to carry us through the next downturn.

Semico believes the transition to 130-nm and smaller process technologies will accelerate as the recovery takes hold and new products are introduced. In 2003, 16 percent of wafers were processed using 130-nm or smaller technology. In 2004, 31 percent of wafers manufactured will use 130-nm or smaller process technology. This equates to almost 23 million wafers out of 74 million used in the production of ICs, excluding discretes and bipolar.

The combination of reduced capital expenditures, continued introduction of new technologies and the closing of older fabs is resulting in spot shortages, reports Semico. With the decline in capital expenditures over the past 2 years, fewer fabs are available for production at new technologies and the advanced technology capacity is being quickly consumed by the increase in demand that Semico predicted would begin in 2003.

“Companies with 300-mm fab shells began putting the wheels in motion to facilitize these fabs late in 2003,” says Semico Analyst Joanne Itow. “We also expect a corresponding increase in upgrades of existing lines and more announcements for 300-mm facilities.”

Semico predicts that almost 12 300-mm fabs will come online in 2005, and that this additional capacity and the numerous 200-mm fabs in China, along with a slight economic downturn, will drive an industry slowdown in 2005.

Embedded Passives ‘Hot Topic’ at APEX

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ANAHEIM, CALIF. — The mood at this year's APEX/IPC show, held February 21-26 in Anaheim, Calif., was positive. One area of increased interest was embedded passives. Embedded passive devices have existed for years, but are now getting a chance at volume production because of the high-density requirements for PCBs and substrates.

When asked “What's new?,” Mentor Graphics mentioned the addition of embedded passive capability to their design tools.

Meetings of the Embedded Passive Devices Materials Task Group of IPC were well attended, with active discussion of the standards documents under development. Chair David McGregor, of DuPont, said that IPC standards on materials for embedded passive devices, in development for several years, are expected to go to balloting this year. Separate documents will be released for capacitor and resistor materials, covering a wide variety of materials and fabrication processes.

Several companies displayed embedded capacitor materials, including 3M and Oak-Mitsui. 3M reported a lot of inquiries for their high-value barium titanate capacitors. Oak-Mitsui produces a family of polymer film-based capacitors with very thin dielectrics, 24 µm down to 8 µm, and capacitance values ranging from 1.0 to 3.1 nF per sq. inch.

Demand currently is focused on thicker dielectrics in this range, but Oak-Mitsui predicts their higher-value product with a 12-µm-thick dielectric will take off in the future — when the market demands higher-value capacitors. DuPont displayed both ceramic capacitors and resistors.

Gould recently began volume production of its embedded thin film resistors, and also introduced TRC+ resistors designed for improved bonding on phenolic resin systems. Sheet resistance values range from 25 to 250 Ohms/sq., with tolerances of ± 10 percent after fabrication, and a ± 1 percent after laser trimming. ESI's Kim Fjeldsted noted that embedded passives are just starting to require tolerances that need laser trimming. ESI's laser trimming equipment is compatible with a variety of thin and thick film resistor technologies, and the company predicts an exciting year ahead.


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