June 7, 2004 – Toshiba Corp., Tokyo, Japan, and Cadence Design Systems, San Diego, CA, have announced the first commercial SoC devices built on the X-architecture design, nearly six months after achieving first silicon.
Toshiba’s 130nm TC90400XGB chip is 11% faster and 10% smaller in random logic area, according to the company. Samples will be available in November, with mass production expected to start in 2Q05. The chip, designed for digital media and home entertainment applications, already has one customer in Europe for digital TVs, Toshiba said.
The X-architecture, also supported by TSMC, UMC, and Infineon, orients a chip’s interconnect wires using diagonal pathways in addition to traditional right-angle (Manhattan style) configurations, improving chip performance.
Infineon successfully fabricated a 130nm test chip in February of this year; last month TSMC verified the 0.13-micron X-architecture design rules with test chips, while UMC released its 0.13-micron version in December 2003.