Advanced Wafer-level Cleaning Method



Flip chip and wafer-level packaging (WLP) technologies have become ubiquitous in recent years in applications from consumer and wireless products to high-performance electronics. As requirements for high performance and reduced form factor grow in these applications, so do the demands on these packaging technologies.

A variety of high-end processes are used for bumping or packaging wafers as WLP. Electroplating of metals and solder deposition use materials such as photoresists and fluxes that need to be completely removed during the manufacturing process. Failure to completely strip these materials can result in contamination, yield loss, downstream problems in test and board-level assembly, and reliability fallout in the field.

Bumping and WLP processes based on electroplating and solder paste have rigorous cleaning requirements. Wafers to be processed as flip chip or WLP come with a plethora of different under-bump metallizations (UBM), passivations (organic and inorganic), solders and substrates. All of these materials demand robust cleaning and stripping solutions. Cleaning chemistries and processes must remove polymerized and baked-on films without damaging or disturbing materials exposed in the process.


Stripping is the complete removal of organic materials from wafers, using media such as liquid chemistries or plasmas. Organic materials, such as resists and fluxes, are used in advanced wafer-level packaging for bump formation, patterning existing metal layers, growing metal in defined patterns or reducing/preventing oxidation during high-temperature processing such as solder reflow. Simplified process flows of a silicon device through two common WLP processes, copper post electroplating and solder paste bumping are shown in Figure 1.

Figure 1. Simplified wafer plating and solder paste bumping process flows, showing potential for corrosion and attack during stripping processes (diagram not to scale).
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In electroplating, a metal (typically Ti(W)Cu or TiNiV) is deposited over the entire wafer to ensure adhesion and provide an electrical bus for connection of plating electrodes. Resist is deposited to define the pattern for flip chip bumps or copper posts. UBM, solder, copper or other metals are plated prior to removing the resist using specially developed stripping chemistries. These chemistries must be quite active to remove the resist. Unfortunately, these same chemical characteristics make them potentially damaging to a number of materials in the newly plated device. Solder, UBM and bus metal are prone to attack through chemical oxidation and etching, and polymer passivation layers may be damaged by overactive chemistries.

There are three main areas in advanced WLP where development of stripping chemistries and processes is crucial for future products: thick resists for plating tall structures, resists that are high crosslinked by high-temperature exposure and resists for fine-line patterning (Table 1).

Table 1. Materials to be stripped in advanced flip chip and wafer-level package processing.
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Plated copper posts have been used in WLP for several years, and have recently appeared in the development of next-generation flip chip technologies.1-3 Tall copper posts require a thick resist for plating. These resists, which are applied as a dry film resist (DFR) or in multiple coats of a liquid resist, can be as much as 120 to 140 µm thick. Removal of thick resists requires long soak time and high temperature. Excessive exposure to active stripping chemistries at elevated temperatures can etch the top and sides of the copper post. In extreme cases, strippers have eaten through the bus metal and attacked the organic passivations underneath.

Several technologies have been developed for forming solder bumps using solder paste and in-situ mask.4 In this case, a thick resist (typically a 50- to 100-µm-thick DFR) is laminated to the wafer and patterned. After solder paste is deposited in the in-situ mask by screen printing, the wafer is sent through an oven to reflow the solder paste. The thickness of the resist and the temperature exposure it sees in this process make it particularly difficult to strip. Attack of the solder bump, exposed UBM/passivation interface and passivations such as polyimide or benzocyclobutene (BCB) have been observed.

Resists and fluxes used in the formation of lead-free and high-lead solder bumps are especially difficult to strip, because of the high temperatures required for reflow. Many stripping processes are optimized for materials used in the formation of bumps with eutectic 63Sn/37Pb solder, which has a peak reflow temperature of approximately 220° to 230°C. Use of these or other organic materials with SnAgCu alloys that have reflow peaks of around 240° to 250°C or high lead alloys with reflow peaks well in excess of 300°C can result in highly crosslinked or baked on films that are tenacious. Engineers will often increase strip temperature or time to compensate for tenacity of the baked-on film, with the result that an over-activated stripper begins to attack the bump, UBM or organic passivations.

Recent interest in post passivation layers (PPL) is pushing the development of processes for fine-line redistribution layers, inductors and other functionality-enhancing structures in WLP. In many cases, metals must be plated on top of layers that have previously seen exposure to stripping chemistries. Stripper-induced damage on the base metal can cause adhesion problems and other quality issues. Fine geometries and high aspect ratios (approaching 5-µm line and 5-µm space for 10-µm-thick lines) will create problems for strippers and processes that must remove resists from between these canyon-like structures.

Consequences of Poor Stripping

Although the technology of stripping has not received significant attention in the literature, ramifications of a poorly controlled process can be huge. Failure to completely strip a resist for bumping or formation of a copper post can leave areas of residual etch mask that will result in incomplete etch of the bus metal, creating quality and yield problems. The incomplete stripping of organics from a wafer's surface can pose serious problems downstream in assembly or test. These organics can inhibit good mechanical and electrical contact between a probe and an I/O on the device. Similarly, organic contamination can prevent solder from wetting to a target pad during board assembly reflow processes, resulting in yield loss in a finished assembly.

Figure 2. These 10,000X micrographs of the surface of a 95Pb/Sn bump after processing with various stripping chemistries and conditions. Formation of lead carbonate whiskers (left) and etching of the bump surface (middle) are seen with uncontrollable stripping chemistries. A targeted, well controlled strip process causes no change in the morphology of the bump surface (right).
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The etching and attack of various structures on the device are subtle. Undercutting of the UBM, pin holing in bus metal and preferential etching of metals in a solder bump are all defects with yield, quality and reliability consequences (Figures 2 and 3).

Stripping Chemistries: Mechanism and Design

The efficacy of a stripping chemistry, as well as its propensity to attack metals and organics on the device, is a function of the chemistry's constituents and process, time and temperature. Chemistries for stripping in advanced WLP processes do not follow the general rule of “stronger is better.” Optimizing the stripper for specific resist chemistries and wafer materials provides higher yields, throughput and quality.

Figure 3. This 10,000X SEM shows that the long strip times and elevated temperature required to remove a thick resist used for plating a copper post have resulted in corrosion of the copper bus metal.
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Understanding the chemistry, crosslinking and solubility parameters of the photoresist aids in the development of effective stripping chemistries. Removal of these crosslinked polymers from the wafer surface typically requires use of a formulated product containing one or more solvents in combination with a source of alkalinity. The solvent or solvent combination is chosen according to its solubility parameters. The polymer has a solubility window dependent on its hydrogen bonding force, polar bond force and dispersion force. Collectively, these make up the Hansen Solubility parameters. The optimum solvent or blended solvents for the application will fall within the solubility window that is plotted with these parameters. If the solubility window of the blended solvents overlaps that of the polymer, a chemistry based on this solvent/solvent blend will swell the crosslinked photoresist film, making the film more susceptible to chemical bond breakage through a reaction with an alkalinity source. The alkaline material may be a base such as sodium hydroxide (NaOH), potassium hydroxide (KOH), tetramethyl ammonium hydroxide (TMAH) or amine chemistry.

The preparation of solvent and base swells and dissolves the film. This swelling increases the penetration of alkaline components, but may also cause lifting of the film from the wafer. Formulating the final product requires balancing the rate of attack on the intermolecular bonds controlling the surface adhesion of the film with the attack on the intramolecular bonds in the bulk film. The potential for redeposition of dissolved material on the wafer surface is limited by controlling the particulate size of the removed resist film.

Compatibility with all the materials on the wafer surface limits the aggressiveness of the materials in the blend. Special additives are used to enhance properties of the stripping solution. Surfactants are used to lower surface tension, aid in penetration and redeposition. Buffers and corrosion inhibitors may be added to reduce or eliminate metal etch.

Time and temperature are important in the stripping process. Higher temperatures may shorten strip time and increase throughput, but may increase the activity of the stripping chemistry to the point of unacceptable attack on metals and passivations. Lower temperatures often reduce the extent of unwanted etching and attack on the wafer, but at the expense of process time. Even when long process times are tolerable, lower temperatures may decrease the effectiveness and life of the chemistry. Many of the solvents used in stripping chemistries are hygroscopic and absorb efficacy-deadening quantities of water at lower temperatures.


The technology of stripping thick plating resists, materials that have seen high temperature exposure, and resists from fine-pitch bump structures is critical in enabling future wafer-level products. Advance stripping chemistries must completely remove these tenacious process materials, yet not damage materials or structures on the wafer. Development of these important stripping chemistries will require increased cooperation between wafer bumpers, wafer-level packaging houses and advanced packaging chemists.


  1. T. Kawahara, “Super CSP,” IEEE Transactions on Advanced Packaging, Vol. 23, Issue 2, pp. 215-219, May 2000.
  2. T. Wakabayashi, “Next Generation Packaging Technologies for Mobile Systems,” December 2000.
  3. K.K. Lau and K.H. Tan, “Flipchip on Leadframe Using Copper Pillar Bump Technology,”
  4. T. Hamano and A. Papalexis, “Wafer Bumping Solutions: Consumer to Advanced Applications,” Advanced Packaging, pp. 21-24, October 2002.
  5. M. Ranjan, S. Zafiropoulo, S. Kay, T. Goodman and P. Elenius, “Wafer-Level Advanced Packaging Technology,” Semiconductor International, pp. SP4-SP8, February 2004.

DIANE SCHEELE, director of technical services, may be contacted at Dynaloy Inc., P.O. Box 33609, Indianapolis, IN 46203; e-mail: [email protected]. THOMAS GOODMAN, managing partner, may be contacted at E&G Technology Partners LLC, 1840 East Warner Rd., A105, #249, Tempe, AZ 85284; e-mail: [email protected].


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