Peregrine unveils 0.25-micron sapphire CMOS process

August 18, 2004 – Peregrine Semiconductor Corp., San Diego, CA, has made its 0.25-micron UltraCMOS silicon-on-sapphire process technology available for foundry services. The offering, a follow-up to Peregrine’s 0.5-micron multiproject-run foundry program, will be available on a quarterly basis beginning in 4Q04.

The process is a patented variation of silicon-on-insulator technology using sapphire substrates, promising better low-power and integration capabilities for RFICs compared with GaAs, SiGe BiCMOS, and bulk silicon CMOS.


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