IBM and Suss team up to get the lead out of semiconductor packages

September 15, 2004 – Taking aim at the evolving requirements for lead-free semiconductor packages, IBM Corp. and Suss MicroTec AG have struck an alliance to commercialize IBM’s next-generation wafer solder-bump technology, called C4NP. In announcing the partnership on Sept. 13, the two companies said C4NP (controlled-collapse chip connection new process) is the first flip-chip technology to support 100% lead-free packaging with a combination of fine-pitch connections, low cost, and the flexibility to use “virtually all types of solder compositions.”

C4NP offers an alternative method for applying flip-chip solder to wafers compared to traditional photo stencil/screening, electroplating, and evaporative techniques. In the C4NP process, reusable glass molds are filled with molten solder and then applied to the wafers. After a reflow step, the glass mold is removed from the wafer, leaving solder bumps. That allows inspection of the molds before committing them to the wafers, to determine 100% good C4 connections–a very simple and hopefully high-yielding process, according to Joe Lisowski, IBM director of worldwide applications and packaging development in East Fishkill, NY.

Under the alliance, IBM’s systems and technology group will continue its research and optimization of C4NP techniques, while Munich-based Suss MicroTec will develop a complete line of 200mm and 300mm wafer tools for commercialization of the technology (IBM is finishing C4NP development for internal use). IBM will provide on-site process training to customers purchasing commercial systems from Suss. A pass-through license for C4NP technology will be included with the purchase of Suss equipment, which is scheduled to become available in 2H05.

Traditional screening or photo stencil techniques are relatively simple, but these approaches face limitations in handling fine-pitch contacts and large wafer sizes, according to IBM and Suss. Electroplating can produce fine-pitch contacts, but there are limits to lead-free alloys. Evaporative processes also fall short in making fine-pitch contacts, and costs become an issue with the introduction of new lead-free solder compositions, according to the companies.

“The C4NP process is simple, from a manufacturing standpoint. You can queue up the glass molds and have them wait for wafers,” explained IBM’s Lisowski. “There is rapid turnaround from the time holds are joined with wafers. The reflow time is short. The molds are cleaned and then ready to go again.” The process also gets rid of a lot of plating chemistries that have to be managed as waste, he added.

IBM and Suss said the C4NP process easily accommodates binary, ternary, and quaternary alloys, and minimizes the cost of consumables because only solder balls are created and transferred to the wafer without waste. The C4NP supports solder bumping of 200mm and 300mm wafers with similar efficiency, according to the two companies, which said the process has demonstrated technical capabilities exceeding requirements in the current International Technology Roadmap for Semiconductors. — J. Robert Lineback, Senior Technical Editor


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