October 13, 2004 – Freescale Semiconductor Inc. and Taiwan Semiconductor Manufacturing Co. (TSMC) have signed an agreement to jointly develop a new generation of silicon-on-insulator (SOI) high-performance transistor front-end technology targeted for the 65nm advanced CMOS process node. The three-year agreement also provides TSMC with manufacturing rights to Freescale’s 90nm SOI technology.
TSMC and Freescale have been developing SOI technology independently for a number of years. Freescale has developed three generations of SOI technology since the mid-1980s. The company has shipped more than 7 million SOI-enabled products since it started production in 2001. It is currently establishing a 90nm CMOS SOI manufacturing platform in its Dan Noble Center facilities in Austin, TX, for next-generation high performance networking and computing products. TSMC has been independently developing SOI technology starting from 0.13micron technology node since the late 1990s.
The 65nm SOI high-performance transistor joint development project will be located at Freescale’s Dan Noble Center.
The collaboration is expected to enable faster time to market of 65nm SOI technology for innovative applications in a variety of markets. During the joint development of the 65nm SOI high-performance transistor frontend technology, the two companies are expected to develop independently their own 65nm metallization back-end technology tailored to their specific market applications.
Freescale will apply the overall technology to 65nm SOI chips at 300mm in the Crolles2 joint R&D and pilot manufacturing facility in France, which it shares with Philips and STMicroelectronics. TSMC may apply the technology in its Taiwan facilities, with a high-speed version that targets performance-driven applications in networking and computing and a low-power version for handheld and portable applications.