MEMC and Solid State Technology to host Silicon Workshop in Boston area

October 5, 2004 – MEMC Electronic Materials Inc. has announced it will again co-sponsor the Understanding Silicon Materials Technical Workshop with Solid State Technology magazine on Oct. 19 in Boston, MA, which will detail the latest developments and advances in silicon wafers to all levels of semiconductor fab engineers and management.

Silicon Workshop attendees will represent a broad cross section of leading area semiconductor makers.

The one-day program will include presentations on the role of flatness and nanotopography, epitaxy for CMOS and power, and new materials for enhancing device performance. Concurrent sessions will focus specifically on logic, memory, power, and analog devices. The presentations will be given by MEMC Fellows and senior members of the Applications Engineering Group.

Information for this event is as follows:
Date: Tuesday, October 19, 2004
Time: Presentations to begin at 8:30 a.m. EST
Location: Sheraton Colonial Hotel and Golf Club
One Audubon Road
Wakefield, Mass. 01880
tel: 781-245-9300; fax: 781-245-0842

For more information and to register for the Understanding Silicon Materials Technical Workshop, please visit MEMC’s web site at: http://www.memc.com/workshop.htm.

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