This was followed quickly with a second U.S. patent issued in early November 2004 (6,815,837), named “Electronic Package with Strengthened Conductive Pad” — an approach to strengthening the design of printed circuits to improve their reliability when assembled with components. The two patents cover technologies that EI developed to enable their customers to push the limits of circuit density and performance, while maintaining quality and reliability.
(December 8, 2004) Minneapolis, Minn. — Speakers at the first International Wafer-Level Packaging Congress (IWLPC), held October 10-12, 2004, in San Jose, Calif., addressed leading-edge IC packaging and test technologies with special emphasis on 3-D stacked packaging. As rated by the attendees, the Best Paper Award was presented to Dr. Udo E. Frank of FEINFOCUS GmbH.