Soitec partners with Sematech to develop multigate FETs for 45nm and below

January 4, 2005 – In an effort to accelerate the development of new-generation transistors, Soitec has announced its participation as the SOI substrate supplier in a development program led by the Advanced Technology Development Facility (ATDF), the new independent subsidiary of Sematech for advanced semiconductor R&D in Austin, TX.

Together with two leading semiconductor manufacturers and a number of equipment suppliers and US-based universities, Soitec has been involved for over a year in this advanced R&D program at ATDF, which specializes in services involving technology development, wafer processing, and analytical and electrical testing.

The ATDF development program focuses on multigate field effect transistor (MuGFET) technology for the 45nm node and below. MuGFET is a generic term used to describe a variety of new, multiple-gate field effect transistors, including CMOS FinFETs (FETs with “fin-shaped” transistors) and triple-gate devices.

Throughout ATDF’s MuGFET program, Soitec has already supplied its SOI engineered substrates for the verification process of a 45nm node MuGFET test chip using 248nm lithography, which resulted in a functional, tri-gate device. In addition, Soitec is also providing SOI substrates for the development of a working FinFET transistor processed with 193-nm lithography.

“ATDF is pleased to have Soitec as a customer for one of its MuGFET emerging technology programs. Our MuGFET program would not have been able to meet its aggressive technical milestones without significant expertise in engineered substrates,” said Dave Lewis, director of technology for ATDF.

“We are very pleased to work with ATDF, and leading chip and equipment makers throughout the supply chain, to provide the industry with new solutions for future technology nodes — 45nm and beyond — based on our SOI technology,” noted Pascal Mauberger, COO of Soitec.


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