April 12, 2005 – Mattson Technology Inc. has announced the shipment of an enhanced version of its Aspen III Highlands system to Sematech, Austin, TX. The 300mm system is being installed at ATDF, Sematech’s R&D wafer fab, which also supports external customers.
Mattson’s strip system will be used by Sematech’s Interconnect Division to develop advanced interconnect structures for 45nm and below chip generations targeted for keff of 2.5 and lower. Mattson and Sematech will work together to develop and optimize low sidewall damage ashprocesses for the integration of copper with porous ultra-low dielectric constant (ULK) materials.
“The Interconnect Division’s overall mission is to develop integration schemes with keff2.5 for the 45nm node and beyond,” said Eric Busch, Interconnect Unit process development program manager. “A key enabler for low keff integration schemes is to significantly reduce the sidewall damage (also known as carbon depletion) on dual-damascene trench sidewalls caused by etch and ash processing. As feature sizes decrease, the sidewall damage contribution to increasing keff becomes larger.”
Busch continued, “We will work with Mattson Technology to develop new lowsidewall damage ash processes. This cooperative development activity will enable Sematech to begin achieving lower keff-integrated device structures and, in turn, position our members and the industry to further address sidewall issues.”
“Porous low-k dielectric integration brings a unique set of challenges in the containment and elimination of process-induced damage,” said Sitaram Arkalgud, director of Sematech’s Interconnect Division. “Our project will seek solutions aimed at enhancing product performance and yield.”