June 8, 2005 – IBM, Chartered Semiconductor Manufacturing, and Samsung Electronics Co. Ltd. are jointly developing design kits for the 65nm base and low-power processes. Specifically, the three companies will offer 65nm designers common design kits that consist of physical verification (design rule checking (DRC) and layout versus schematic (LVS) matching) and parasitic extraction (RCX) technology files.

Additionally, the companies will also make available common SRAM kits for single- and dual-port memories, eFUSE kit and electrostatic discharge (ESD) kit. These initial design kits have been validated using a test chip, which demonstrates their capabilities for realizing fast and silicon-accurate 65nm designs.

“Extending our collaboration from technology development to design enablement development, IBM, Chartered and Samsung are accelerating efforts to enable a comprehensive ecosystem of design support around the 65nm technology platform,” said Steve Longoria, VP, Semiconductor Technology Platform for IBM. “This model of true collaboration and open design differentiates the common platform and provides customers cutting-edge technology, enhanced design portability, and multisourcing flexibility.”